Drop to user-space in kernel/protected build with up_pthread_exit,
now all pthread_cleanup functions executed in user mode.
* A new syscall SYS_pthread_exit added
* A new tcb flag TCB_FLAG_CANCEL_DOING added
* up_pthread_exit implemented for riscv/arm arch
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
If the subcore configuration, which is mainly used in the Spresense
Arduino environment, is enabled, the serial console has been already
initialized by maincore. Then, don't need to re-initialize the UART1
serial driver.
ADC driver does not support multiple open and close. It causes the memory
corruption by multiple free. This commit fixes this problem by introducing
the reference counter.
If the system clock is changed during loading gnssfw, gnss open may be
failed. So this commit prohibits clock change until loading gnssfw is
completed.
There is an issue that the next alarm is expired immediately after
canceling a RTC alarm. Fixed alarm settings to be completely cleared
when canceling an RTC alarm.
If the system clock is changed during the SPI transfer, the SPI data can
be corrupted. So this commit prohibits the clock change during SPI transfer,
and keep the clock until the transfer is completed.
Introduce PM_CPUFREQLOCK_FLAG_HOLD into the frequency lock mechanism in
power manager, which is used to keep the current frequency without clock
change, for example, during the transfer of a periphral.
UART driver is stopped and re-started during a clock change. When a UART
interrupt is generated in each process, the unexpected behavior will
occur and a console will get stuck with UART driver. This commit fixed
each process is performed atomically.
specified the name of remote proc(rpmsg server)
Change-Id: I0086bb43727a2bbb5e68f88907b5e4608182ef9c
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
N/A
specified the name of remote proc(rpmsg server)
Change-Id: Ie270d651071e87a40a80ab489597ae18db9814f0
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
Currently Nuttx doesn't seem to be any real support for OTG.
In the future when OTG is supported. This Knob can be removed
and drivers can enable their pin sets based on CONFIG_OTG.
(Adding CONFIG_OTG at this time would be misleading.)
stm32f7:SDMMC Use inttypes in printing macro
stm32f7:CAN Use inttypes in printing macro
stm32f7:DMA Use inttypes in printing macro
stm32f7:serial fix compile error from UNUSED() change
The RISC-V Integer Calling Convention states that the stack pointer
shall always be aligned to a 128-bit boundary upon procedure entry, both
for RV32* and RV64* ISAs (exception to the RV32E ISA, which must follow a
specific convention)
Summary:
- This commit adds stack coloration for the idle task
Impact:
- rp2040 with CONFIG_STACK_COLORATION=y
Testing:
- Tested with nsh, nshsram and smp configurations
- NOTE: CONFIG_STACK_COLORATION=y needs to be added
Summary:
- The NuttX for raspberrypi-pico boots via the boot_stage2 provided
by the pico-sdk which sets the MSP at the end of the SRAM.
- However, the NuttX expects the MSP is set to the top of the idle stack.
- This commit fixes this issue.
Impact:
- None
Testing:
- Tested with nsh, nshsram and smp configrations
Summary:
- SP_SECTION was introduced to allocate spinlock in non-cachable
region mainly for Cortex-A to stabilize the NuttX SMP kernel
- However, all spinlocks are now allocated in cachable area and
works without any problems
- So SP_SECTION should be removed to simplify the kernel code
Impact:
- None
Testing:
- Build test only
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- The CONFIG_SMP_IDLETHREAD_STACKSIZE was introduced to optimize
the idle stack size for other than CPU0
- However, there are no big differences between the idle stacks.
- This commit removes the config to simplify the kernel code
Impact:
- All SMP configurations
Testing:
- Tested with ostest with the following configs
- spresense:smp, spresense:rndis_smp
- esp32-devkitc:smp (QEMU), maix-bit:smp (QEMU)
- sabre-6quad:smp (QEMU), sabre-6quad:netnsh_smp (QEMU)
- raspberrypi-pico:smp, sim:smp (x86_64)
Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
This config is only useful when there is a > 4MB PSRAM and thus needs to
be selected by the user explicitly.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Reapply the following commit [1], which has been reverted by
the recent change [2] with no obvious reasons.
Also, add a comment block to explain the calculation.
[1]
```
commit 298c2e5e4f
Author: YAMAMOTO Takashi <yamamoto@midokura.com>
Date: Wed Jan 29 03:26:43 2020 +0900
sim: Fix stack alignment
The recent x86-64 convention requires 16-byte alignment before
(not after) calling a function.
This fixes snprintf crash I observed on macOS while saving XMM registers.
```
[2]
```
commit 2335b69120
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date: Mon Apr 12 23:44:08 2021 +0800
arch: Allocate the space from the beginning in up_stack_frame
arch: Allocate the space from the beginning in up_stack_frame
and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
```
Summary:
- This commit adds coloration for the idle stacks
Impact:
- k210 only
Testing:
- Tested with smp and nsh configs with QEMU and dev board
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit adds coloration for the idle stack
- Also, apply la pseudo-instruction instead of lui and addi
Impact:
- fe310 only
Testing:
- Tested with nsh with QEMU and dev board
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
stm32h7:Serial Use Idel to poll RX DMA
stm32h7:Serial Do not loop in an ISR!
stm32h7:Serial signal txdma completion with semaphore
stm32h7:Serial Apply formatting suggestions from code review
Co-authored-by: Mateusz Szafoni <raiden00pl@gmail.com>
stm32h7: Serail Add Power Managment (Untested)
arch: Allocate the space from the beginning in up_stack_frame
and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
For unknown reasons this message may interferre with the calibration
procedure and result in invalid calibariton data.
We leave only a message informing about the end of the the calibration.
The problem was observed for STM32G4 + IHM16M1.
I've seen a module with 16 bytes .rodata alignment for xmm operations.
It was getting SEGV on sim/Linux because of the alignment issue.
The same module binary seems working fine after applying this patch.
Also, tested on sim/macOS and esp32 on qemu,
using a module with an artificially large alignment. (64 bytes)
Change the logic for allocating user heap for PROTECTED_BUILD:
- Don't rely on SRAM1_END alignment
- Make better use of MPU subregions when allocating the heap
- Don't duplicate the calculation of user heap start in kernel heap
allocation; use the previous calculation directly
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
Summary:
- I noticed that stack corruption happens due to recent refactoring
- This commit fixes this issue
Impact:
- SMP only
Testing:
- Tested with maix-bit:smp (QMU and dev board)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Some ESP32 GPIO pins (2, 4, 12, 13, 25, 27, 32) weren't accepting
pull-up/pull-down resistors. These pins are RTC GPIO pins and need
to have pull-up/pull-down configured in the RTC registers.
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
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That field is never used and, in most cases, is never initialized correctly.
This should have no impact to anything with the possible exception of free-running drivers.
Verified using CI builds only.
The comments at the top of the file say this:
```
This will be automatically registered
* - AXI SRAM is a 512kb memory area. This will be automatically registered
* with the system heap in up_allocate_heap, all the other memory
* regions will be registered in arm_addregion().
```
but the implementation was using SRAM123 instead. Furthermore, arm_addregion then re-adds SRAM123 again.
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This change makes it so that the timeout is set as part of the SDIO_WAITENABLE call instead of the SDIO_EVENTWAIT call. By doing so, you eliminate all opportunity for a race condition.
stm32h7:sdmmc Check if busy ended early
1.To support the different MCU in series(e.g. cortex-m0+)
2.It's redundant since we already specify in compliler option
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Normally, statically allocated data goes in .bss, followed by the
initial stack, followed by HEAP. However, any data that is statically
allocated in SRAM4 with __attribute__ ((section (".sram4"))) will
clobber, and be clobbered by, the HEAP.
On STM32H7, BDMA can only access SRAM4. Therefore any BDMA buffers (or
any other data) placed in SRAM4 will expose this problem. In one case,
this manifested as a failure of NSH to start, because the SPI6 BDMA
buffers clobbered the /dev/console inode structs, which the OS
allocated earlier.
This PR ensures that only the rest of SRAM4, after any static data, is
added to the heap. This PR also allows SRAM4 to be completely excluded
from the heap by a new Kconfig, CONFIG_STM32H7_SRAM4EXCLUDE, similar
to what CONFIG_STM32H7_DTCMEXCLUDE does for the DTCM region.
Change required in linker scripts:
Every STM32H7 linker script must replace this:
.sram4 :
{
} > sram4
with this:
.sram4_reserve (NOLOAD) :
{
*(.sram4)
. = ALIGN(4);
_sram4_heap_start = ABSOLUTE(.);
} > sram4
or link will fail with: undefined reference to '_sram4_heap_start'.
The Release Notes should document this for users with out-of-tree
boards.
arch/arm/src/stm32h7/Kconfig:
* Add config STM32H7_SRAM4EXCLUDE to allow excluding all of SRAM4
from the HEAP.
arch/arm/src/stm32h7/stm32_allocateheap.c:
* Only when including SRAM4 in the heap, define HAVE_SRAM4,
SRAM4_START, SRAM4_END, and SRAM4_HEAP_START.
* Add "Private Data" section.
* Add extern for_sram4_heap_start, which must be defined in the
board's linker script.
* arm_addregion(): Only add SRAM4 to the heap when configured to
do so, i.e., unless CONFIG_STM32H7_SRAM4EXCLUDE is defined, and
only add the portion of SRAM4 that is past any static data.
boards/arm/stm32h7/nucleo-h743zi/scripts/flash.ld:
boards/arm/stm32h7/nucleo-h743zi/scripts/kernel.space.ld:
boards/arm/stm32h7/nucleo-h743zi2/scripts/flash.ld:
boards/arm/stm32h7/stm32h747i-disco/scripts/flash.ld:
boards/arm/stm32h7/stm32h747i-disco/scripts/kernel.space.ld:
* Update all in-tree STM32H7 board linker scripts as described in
"Change required in linker scripts" above.
Testing:
* Successfully built all of the following configurations:
nucleo-h743zi2:jumbo
nucleo-h743zi2:nsh
nucleo-h743zi:nxlines_oled
nucleo-h743zi:elf
nucleo-h743zi:otg_fs_host
nucleo-h743zi:nsh
nucleo-h743zi:netnsh
nucleo-h743zi:pwm
stm32h747i-disco:nsh
* Tested with custom board.
* nxstyle.
References:
[1] See the dev@nuttx.a.o mailing list discussion started 2021/03/25:
"How to ensure HEAP will not overlap static DMA buffer?"
https://lists.apache.org/thread.html/recf2bb9043f8c9f53c10917e2adb2ec64fe35dc5e6f9a695a7ac6ecc%40%3Cdev.nuttx.apache.org%3E
[2] See arm_addregion() in arch/arm/src/stm32h7/stm32_allocateheap.c
Thanks to Gregory Nutt and David Sidrane for suggestions and reviews.
The maximum number of samples which can be handled without overrun depends on various factors.
This is the user's responsibility to correctly select this value.
Since the interfece to update the sampling time is available for all supported devices,
the user can change the default vaules in the board initialization logic and avoid ADC overrun.
This fixes the problem that an assertion in sim build aborted NuttX
even when the assertion was generated from userspace (in which case
simpy the task needs to exit). This required moving the relevant code
into the sim blob.
tcpip ok
update wifi demo configuration
fix tcpip input cause misalign fault
change some api definetions in nuttx
fix wifi manager strlen copy without suffix null character
fix 602 network buf allocation issue
wifi scan works
[ble] Add controller code
[BLE] Add nuttx adapt code for blecontroller .
[BLE] modified include file path, to fix cflag is too long.
[ble]Test ble peripheral pass, save code.
[ble] Organize the code
[BLE] Add blecontroller config for nuttx
[BLE] Add config for ble example
fix tcp lost packet when rx
support wpa3.
Copy default config from wifi default config. Create ble for local test and ble tester for autopts.
Add config for local test.
Add pts teset config for host test
Add config for mesh test
Create task to init blecontroller
Delete blecontroller rx thread.
using idle task to receive hci command from host
Set ble device name to /dev/ble, and fix code.
1.fix a ke schedule risk 2. CFG_HOST is enabled only in the case that CONFIG_BLE_HOST_DISABLE is not enabled, by lanlan
rm _sp_main stack.
change h/l workq_stack_size 6K
change l workq_stack_size 3K.
[ble] delete file_detach
color idle stack.
clear bl602 netdev code
SCAN is sorted according to RSSI
enlarge nsh command line buffer
fixup stack overflow check checkfail when startup
arch/risc-v/BL602:fix reboot cause crash
reboot default use romapi.
riscv/bl602:netdev support defered input, remove wifi_tx function
risc-v/bl602:fix sem_timedwait usage error in bl_cmds
risc-v/bl602:fix memory access out of bounds when copy ssid
remove ble and wifi source, download when build
add bl602 blob gitignore
risc-v/bl602:remove ble-pts defconfig
Fix some typos in NuttX style naming
Fix the replacement of tab to space
fix wlan interface down still receive packet
fix wapi crash, rx when ifdown,and ble_hci_rx_do
change system reset to rom dirver
change ble hci interval to 50ms
NuttX support wifi enable/disable log via KConfig
support country code configuration in Kconfig
fix ap tx not work
arch/arm/src/stm32h7/stm32_dma.c:
* Include <inttypes.h> explicitly for format specifiers.
* In functions stm32_mdma_capable(), stm32_mdma_dump(),
stm32_sdma_setup(), stm32_sdma_capable(), stm32_sdma_dump(),
stm32_bdma_setup(), stm32_bdma_capable(), stm32_bdma_dump(),
stm32_dmamux_dump(), stm32_dmachannel(), stm32_dmafree(), and
stm32_dmadump():
Where appropriate, use format specifiers from <inttypes.h> in
calls to dmainfo(). This removes numerous compiler warnings
like:
warning: format '%x' expects argument of type 'unsigned int',
but argument 3 has type 'uint32_t {aka long unsigned int}'
[-Wformat=]
* In function stm32_mdma_disable():
Remove wrong redefinition of 'dmachan' parameter as a local
variable. This fixes the following compiler error that occurs
when building with CONFIG_STM32H7_MDMA:
chip/stm32_dma.c:930:17: error: 'dmachan' redeclared as
different kind of symbol
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
^~~~~~~
chip/stm32_dma.c:928:44: note: previous definition of 'dmachan'
was here
static void stm32_mdma_disable(DMA_CHANNEL dmachan)
^~~~~~~
chip/stm32_dma.c:930:43: error: 'handle' undeclared (first use
in this function); did you mean 'random'?
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
^~~~~~
random
For example Windows RNDIS driver issues SETUP requests that are 76 bytes
long. Previously NuttX would read them all, but only if they arrive at
the same time. If host transfer scheduling causes a pause between the
two DATA packets, stm32_ep0out_receive() would proceed with an incomplete
transfer. The rest of the data could either be skipped by the error handler
branch, or be left in NAK state forever, stopping any further communication
on the endpoint.
This commit changes it so that the whole transfer has to be received before
SETUP handler is called. Depending on CONFIG_USBDEV_SETUP_MAXDATASIZE any
excess bytes will be discarded, but doing this in a controlled way ensures
deterministic behavior. In the specific case of RNDIS, the trailing bytes
are unused padding bytes and can be safely discarded.
Summary:
- In the previous implementation, signal handling for SMP was done
in a critical section that is not correct
- This commit fixes this issue
Impact:
- signal handling for SMP
Testing:
- Tested with ostest
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
arch/arm/src/stm32/Kconfig:
* configs ARCH_CHIP_STM32G431K, ARCH_CHIP_STM32G431C,
ARCH_CHIP_STM32G431R, ARCH_CHIP_STM32G431M, and
ARCH_CHIP_STM32G431V: Fix copy/paste of incorrect
names shown in the Kconfig menu.
nxstyle is complaining that the headers are defines outside
Included Files section and we have to duplicate the definitions
to the imported files to avoid build errors.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Sebastien Lorquet has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Alan Carvalho de Assis has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
David Sidrane has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
David S. Alessio has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
since other subsystem doesn't need call these function anymore
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Idfb217c412db62d9f17f427310b75bb78785dc50
Previously SPI interrupts were enabled on DMA initialization. But since
the addition of SPI Mixed mode it created a side-effect, breaking
polling transfers. So now interrupts are enabled before the DMA
transactions and disabled once they are finished.
Furthermore, the transaction done flag is also cleared before a new
transaction starts.
Commit 6382b2ba introduced the possibility of using SPI in Mixed mode,
i.e. performing SPI transfers via both polling and interrupts. However,
setbits was only applying the configuration if DMA was not enabled.
Since the original stm32l4 version of this code already has an ASF
license header do that for stm32l5, too.
Apply latest changes to stm32l4_spi.c to stm32l5_spi.c as well.
Update stm32l5/Kconfig to allow selection of SPI1/2/3.
Signed-off-by: Michael Jung <mijung@gmx.net>
The LSE crystal oscillator driving strength can only be decreased to the
lower drive capability (LSEDRV = 00b) once the LSE is running, but not
to any other drive capability. Instead of letting the user select a
value between 0 and 3 and then failing the build if the selected value
was not 0, make it a boolean option.
Signed-off-by: Michael Jung <mijung@gmx.net>
Ported from stm32f7/h7: If configured this way, ramp-up the LSE crystal
oscillator driving strength until the LSE starts up.
Signed-off-by: Michael Jung <mijung@gmx.net>
Because a thread of gnss receiver is created by pthread in the
AppBringUp task, the thread would be killed when AppBringUp
task exits.
Change to use kthread_create instead of pthread_create to prevent
this issue.
cxd56_gnss.c uses file descriptor operation from next change.
0536953 Kernel module should prefer functions with nx/kmm prefix
But this change need to add fcntl.h in include header.
So, add missing header.
As proposed by David Sidrane. Required drive strength is board specific
and should be defined in the respective board.h file.
Signed-off-by: Michael Jung <mijung@gmx.net>
Architecture support for STMicroelectronics STM32L552xx and STM32L562xx
MCUs. This is based on corresponding code for STM32L4, but has been
considerably adjusted. Tested with Nucleo-L552ZE-Q and STM32L562E-DK
boards with simple NSH configurations.
Signed-off-by: Michael Jung <mijung@gmx.net>
is enabled.
That region is technically part of the PRO CPU and we should be able to
allocate it early. However, QEMU uses a slightly different bootloader
image that uses the same part for both CPU. So, when APP CPU starts
during the SMP bring up it will corrupt some data.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
In case CONFIG_MM_REGIONS doesn't include all the available memory
regions the user will have a warning to increase it.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Internal heap was occupying the region straight after .data up to
HEAP_REGION1. The issue with this is if static allocation is large,
we'll end up with too little memory left for the internal heap.
Moving it to the beginning of region 2 gives us more room to play with.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Alan Carvalho de Assis has submitted the SGA and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
mmcsd:Remove CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
stm32h7:sdmmc remove CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
stm32f7:sdmmc remove CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
stm32f7:sdmmc WRITE COMPLETE prevent false triggers
stm32h7:sdmmc WRITE COMPLETE prevent false triggers
While testing PR #2989 on the H7 I noticed that the cards
were staying in 1-bit mode. The root cause was that the
scr read path was using DMA without an invlidate.
This was caused by CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT,
but the sdmmc driver, did not use the delayed invalidate
nor would it work on 8 bytes.
The driver fully supported dcache mgt on runt buffers, but
the #ifdef CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT blocked it.
Reviewing the PR that added CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
it may have been valid at the time. But after the dcache operations
we fixed. It is not necessary and offers no benefit.
Summary:
- This commit fixes an error message in imx_enet.c
Impact:
- None
Testing:
- Build only
Suggested-by: David Sidrane <David.Sidrane@NscDg.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit adds CPU activity LED feature to cxd56_idle.c and cx56_irq.c
- An LED for the current CPU will turn off before calling WFI
- An LED for the current CPU will turn on when an interrupt happens
Impact:
- CONFIG_ARCH_LEDS_CPU_ACTIVITY=y only
Testing:
- defconfigs will be commited later.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- The original commit was added to avoid hardfault but the
root cause was the stack corruption which has been fixed by
the previous commit. So let me revert the original commit.
Impact:
- SMP only
Testing:
- spresense:rndis_smp with nxplayer + telnet
This reverts commit 197187d826.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit fixes hardfault when running nxplayer with rndis_smp
Impact:
- SMP only
Testing:
- Tested with rndis_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
In scenarios where there is suspicion that someone might be touching your data when you don't expect, you can setup a watchpoint, and then guard accesses that you know are valid. If the debugger halts due to the watchpoint, you'll see where the unexpected access is coming from.
Implement si_send/sendto/recvfrom with si_sendmsg/recvmsg, instead of
the other way round.
Change-Id: I7b858556996e0862df22807a6edf6d7cfe6518fc
Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
since sometime platform code need do some special action during memcpy
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Id108ef4232376feab3e37e9b3aee9a7927a03bd4
Bug description:
CONFIG_SMP=y
Suppose we have 2 cores in SMP, here is the ps return:
PID GROUP CPU PRI POLICY TYPE NPX STATE STACK USED FILLED COMMAND
0 0 0 0 FIFO Kthread N-- Assigned 004076 000748 18.3% CPU0 IDLE
1 0 1 0 FIFO Kthread N-- Running 004096 000540 13.1% CPU1 IDLE
nsh> kill -4 0
or:
nsh> kill -4 1
system blocked.
Reason:
In func xx_sigdeliver() restore stage, when saved_irqcount == 0, that means
rtcb NOT in critical_section before switch to xx_sigdeliver(), then we need
reset the critical_section state before swith back.
Fix:
Add condition to cover saved_irqcount == 0.
Change-Id: I4af7f95e47f6d78a4094c3757d39b01ac9d533b3
Signed-off-by: ligd <liguiding1@xiaomi.com>
This Knob will cycle through the values from
low to high. To avoid damaging the crystal.
We want to use the lowest setting that gets
the OSC running. See app note AN2867
This Knob will cycle through the correct*
values from low to high. To avoid damaging
the crystal. We want to use the lowest setting
that gets the OSC running. See app note AN2867
*It will take into account the rev of the silicon
and use the correct code points to achive the drive
strength. See Eratta ES0392 Rev 7 2.2.14 LSE oscillator
driving capability selection bits are swapped.
With TrustZone support in armv8-m the bit-fields in EXC_RETURN have been
extended. Bit 6 ('S') now specifies whether the interrupted program was
running in the Non-Secure (S=0) or Secure (S=1) security state.
Furthermore, Bit 0 ('ES' - Exception Secure) specifies the
security state athe exception is taken to (0: Non-Secure, 1: Secure).
When NuttX is run together with TrustedFirmware-M as the application in
the non-secure world both the S and the ES bits have to be set to '0'.
For armv8-m those are also the correct values if TrustZone is not
implemented on the respective MCU or if it is disabled.
Signed-off-by: Michael Jung <mijung@gmx.net>
This seems to fix esp32_readdata_encrypted() with spiram "buffer".
Note: I'm not sure if this is the right fix or not.
I couldn't find any documentation about Cache_Flush.
Summary:
- This commit applies armv7-m signal handling logic
Impact:
- armv6-m signal handling
Testing:
- Tested with ostest with the following configs
- raspberrypi-pico:nsh, raspberrypi-pico:smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
IRQs cannot be individually disabled on the eZ80, so using
`up_disable_irq()` had no effect. This left the IRQ handler being
constantly triggered without the lower half handler running.
The macro for EMAC stats was incompatible with Clang. The simplified
form gives identical results under ZDS-II.
The MII clock speed must be set before trying to read MII registers.
It's now done before resetting the PHY using the Mode Control Register.
MII initialization waited on the auto-neogotiate restart bit being set
but PHY hardware is frequently fast enough to have cleared the bit
before the first read of it. It now instead just waits on auto-negotiate
completing. The MII poll loop now uses `up_mdelay` because it was far
too fast at 50MHz using a busy loop, giving time for a link to be
established.
Bad packets are now processed enough to release their buffers back to
the EMAC hardware.
A few typos, unused variables, and other miscellaneous issues were also
fixed.
Summary:
- This commit adds 'select ARM_HAVE_WFE_SEV' to ARCH_CHIP_RP2040
- Now NuttX spinlock uses WFE/SEV to reduce power consumption
- Also, modify a comment on rp2040
Impact:
- rp2040 only
Testing:
- Tested with raspberrypi-pico:smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
You can find them used in the ROM version of memcpy.
While it might be controversial if it's a good idea to use the ROM version
of these functions, it's nicer to support more instructions here anyway.
Summary:
- In the previous implementation, the build system stops if
PICO_SDK_PATH is not set.
- However, this behavior is not good for CI. Because the path
is only used to generate a flash image.
- This commit fixes this issue
Impact:
- rp2040 only
Testing:
- Tested with and without PICO_SDK_PATH
The GPIO example was also extended to include testing an interrupt pin.
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Co-authored-by: Alan Carvalho <alan.carvalho@espressif.com>
This commits adds support for the ESP32-C3 IO Mux and GPIO Matrix. It
also includes necessary board logic to run the GPIO example with 2
outputs.
Co-authored-by: Alan Carvalho <alan.carvalho@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
This change reflects that the geometry isn't related to the largest
allocatable unit on the platform.
Calls to read and write block devices are also affected and have
been updated.
Check if all messages were transferred, if not, return -ENXIO.
This is particularly useful when the slave returns an unexpected NAK,
the application code should catch the error to avoid failing silently.
Summary:
- This commit fixes a compile warning if CONFIG_ARCH_INTERRUPTSTACK is set
Impact:
- None
Testing:
- Built with esp32-devkitc:smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- Recently I noticed that ESP32-DevKitC-32D suddenly stops
during receiving ping packets from PC after 10-20mins
- Actually, sometimes memory leak happened when some device
sent a big broadcast packet periodically on the network
- This commit fixes this issue by calling esp_wifi_free_eb()
in the case that the packet exceeds WLAN_BUF_SIZE.
- Also, this commit applies the same logic in the case that
the Wi-Fi interface is down
Impact:
- None
Testing:
- Tested with esp32-devkitc:wapi
Suggested-by: YAMAMOTO Takashi <yamamoto@midokura.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit introduces driver-specific spinlock in cxd56_serial.c
to improve performance
Impact:
- SMP only
Testing:
- Tested with spresense:wifi and spresense:wifi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit changes spinlock APIs (spin_lock_irqsave/spin_unlock_irqrestore)
- In the previous implementation, the global spinlock (i.e. g_irq_spin) was used.
- This commit allows to use caller specific spinlock but also supports to use
g_irq_spin for backword compatibility (In this case, NULL must be specified)
Impact:
- None
Testing:
- Tested with the following configurations
- spresnse:wifi, spresense:wifi_smp
- esp32-devkitc:smp (QEMU), sabre6-quad:smp (QEMU)
- maxi-bit:smp (QEMU), sim:smp
- stm32f4discovery:wifi
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit fixes style warnings under max32660
- Also fix compile errors in max32660_gpio.c with CONFIG_DEBUG_GPIO_INFO=y
Impact:
- None
Testing:
- Built with max32660-evsys:nsh
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- In the previous imxrt_enet.c, imxrt_enet.c assumed that
CONFIG_NET_ETH_PKTSIZE includes the ethernet CRC (4bytes)
- However, most of the driver implementation explicitly
add CONFIG_NET_GUARDSIZE for the CRC to the internal buffer
- This commit conforms to such rules
Imapct:
- No impact
Testing:
- Tested with iperf with imxrt1060-evk
- NOTE: need to add the following configs
+CONFIG_EXAMPLES_IPERF=y
+CONFIG_EXAMPLES_IPERFTEST_DEVNAME="eth0"
+CONFIG_IOB_NBUFFERS=128
+CONFIG_NET_ETH_PKTSIZE=1514
+CONFIG_NET_GUARDSIZE=4
+CONFIG_RR_INTERVAL=200
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Port C was not working because the GPIO pin count was
wrong. The 48 pin packages has 34 GPIO (Not counting PH0 & PH1)
It is GPIOA GPIO B (sans PB11) and GPIOC PC13-PC15
The calls via RTC API weren't fast enough for the edge case
of minimum counter value, resulting in the timer never
expiring as the counter had already passed the compare value.
This now uses direct register access functions and also
gets the latest counter value in edge case.
This function is already declared in include/nuttx/init.h include this
file instead.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Don't declare riscv_addregion if CONFIG_MM_REGIONS is < 1, so we won't
have to provide a dummy stub for every chip.
Also rename the function from up_addregion to riscv_addregion since it's
not exported outside the arch directory.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
The MCAN driver private structure has been renamed to struct sam_mcan_s,
but some functions reference sam_can_s. There are missing defines
of return variable in some functions.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Summary:
- This commit fixes a compile error in imx_enet.c
with CONFIG_DEBUG_ASSERTIONS=y
Impact:
- None
Testing:
- Tested with sabre-6quad:netnsh with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit fixes imx_enet.c if CONFIG_IMX_ENET_NTXBUFFERS=1
- Also adds some ninfo() debug messages
Impact:
- imx_enet.c only
Testing:
- Tested with sabre-6quad:netnsh with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- Since imx_enet.c is based on imxrt_enet.c and still under debugging,
the differences should be minimum to keep tracking the changes
Impact:
- None
Testing:
- Tested with sabre-6quad:netnsh with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
The static memory is now divided at almost the middle to not override
the ROM data. The old 0x28000 will take all of what's left for heap
region1.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Summary:
- This commit fixes compile errors in esp32_spiflash.c and
esp32_wifi_adapter.c with CONFIG_SMP=y
Impact:
- SMP only
Testing:
- Tested with esp32-devkitc:wapi
- NOTE: the following configs need to be added.
+CONFIG_SMP=y
+CONFIG_SMP_IDLETHREAD_STACKSIZE=3072
+CONFIG_SMP_NCPUS=2
+CONFIG_SPINLOCK_IRQ=y
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
The stm32f412 was not a clean port. This is one step to fix
it. The shortcuts taken has caused more wasted hours finding
bad pin mappings then doing the job correctlry to begin with.
stm32:Kconfig Add CAN2 on STM32F412
SMP was broken because the ROM memory wasn't set correctly. Some
regions were shared with the ROM code.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Requiring the size to be a multiple of 3 is a very strange restriction.
It doesn't even work with the default value of SPI_SLAVE_BUFSIZE.
I guess it was a typo.
The original assertion was wrong because:
* cpuint numbers for edge interrupts are not dense
(while ESP32_CPUINT_NEDGEPERIPHS is 4, EPS32_CPUINT_EDGESET is not 0xf.)
* This function is used for level interrupts too
This bug made certain values of DRIVE setting
to be wrongly applied (which can be dangerous
under certain situations since for example H0D1
was mapped to H0H1).
1. when sending a message in a group fails, exit immediately
2. when catch I2C error interrupt, close interrupt
3. clear clock configuration when deinit I2C
4. free I2C interrupt when deinit I2C
