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10630 Commits

Author SHA1 Message Date
Gregory Nutt
639bf31eb4 Move enabling of GPIO peripherals form UART setup to clockconfig. This is not a UART function. It is needed by all periphrals. 2017-04-17 17:20:55 -06:00
Gregory Nutt
8b157b034d STM32F0: Fixes to get STM32F0-Discovery build again after changes to support the STM32F07x 2017-04-17 17:13:32 -06:00
Gregory Nutt
2c01aaad59 STM32F0: Add basic support for STM32F07x family 2017-04-17 16:54:07 -06:00
Alan Carvalho de Assis
b0597583da Fix System Clock value to 48MHz and remove MCLK definition 2017-04-17 12:48:07 -06:00
Alan Carvalho de Assis
735f4d6ea5 STM32F0: Enable the clock for all GPIO ports 2017-04-17 09:58:04 -06:00
Gregory Nutt
cd62425433 STM32F0: type of regval should be uint32_t in clockconfig(). Fix a warning from __start(). 2017-04-17 09:17:31 -06:00
Gregory Nutt
55faedb40d STM32F0: Ooops Missing semicolon 2017-04-17 08:57:00 -06:00
Gregory Nutt
0d9395588b STM32F0: Fix an error in clockconfig() 2017-04-17 08:50:03 -06:00
phreakuencies
eac049222c STM32: Provide TIM5 definition for STM32F429 2017-04-15 12:10:42 -06:00
Gregory Nutt
78bc1aa6bc Argument of network device IOCTL should be unsigned long, just as will all other IOCTL methods. 2017-04-15 09:33:27 -06:00
Simon Piriou
11d3db5c35 photon: add sdpcm + thread support for wlan 2017-04-15 11:39:13 +02:00
Alan Carvalho de Assis
03cbf21cd8 Replace HAVE_USART with HAVE_UART 2017-04-14 11:44:51 -06:00
Alan Carvalho de Assis
4602212612 Fix serial compilation issues 2017-04-14 11:42:20 -06:00
Gregory Nutt
879273f63e arch/arm/Kconfig: Add option for STM32F0 2017-04-14 09:32:15 -06:00
Alan Carvalho de Assis
2cc7744b0c Add stm32f0discovery board support 2017-04-14 08:34:38 -06:00
Gregory Nutt
c910334ced Make sure that Alan is listed as author in new files. 2017-04-14 08:34:37 -06:00
Alan Carvalho de Assis
c3e0ec369f Add basic support for STM32F0 2017-04-14 08:34:36 -06:00
Sebastien Lorquet
dc2890904d STM32L4 DMA: Correct bad channel definition. 2017-04-12 10:25:51 -06:00
Alan Carvalho de Assis
a58823c449 STM32XX: Fix Pending Register definition 2017-04-11 06:45:45 -06:00
Jussi Kivilinna
4c99a6aeec STM32F7: serial: do not stop processing input in SW flow-control mode 2017-04-11 06:40:44 -06:00
Jussi Kivilinna
e9a8dc7c6e STM32F7: serial: disallow broken configuration combination of CONFIG_STM32F7_FLOWCONTROL_BROKEN=y and CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS not set. 2017-04-11 06:39:27 -06:00
Gregory Nutt
ebd2416f9d stm32 COMP: Logic in stm32_comp.h must be configured on CONFIG_STM32_COMP or otherwise it causes an error via #error on every platform without COMP support. 2017-04-09 11:47:57 -06:00
Masayuki Ishikawa
b4e01ecbf9 Merged in masayuki2009/nuttx.nuttx/fix_efm32_i2c_timeout (pull request #312) 
EFM32 I2C: Fix timeout calculation

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-04-06 22:59:34 +00:00
Jussi Kivilinna
e3b3e57e56 RTC: add interface for check if RTC time has been set 
New interface allows checking if RTC time has been set.  This allows to application to detect if RTC has valid time (after
reset) or should application attempt to get real time by other means (for example, by launching ntpclient or GPS).
 2017-04-06 09:53:11 -06:00
Gregory Nutt
ac8ddf4eb1 SAMv7: In review of last patch, change literal 0xfff to WDT_MR_WDD_MAX for portability. 2017-04-06 09:46:04 -06:00
Frank Benkert
571f3d952e SAMV7: Watchdog: fix Forbidden Window Value 
According the Datasheet the WDD Value is the lower bound of a so called Forbidden Window and to disable this we have to set the WDD
Value greater than or equal to the WDV Value.  This seems to be a bug in the datasheet. It looks like we have to set it to a greater value than the WDV to realy disable this Thing.  When triggering the Watchdog faster than the (very slow) clock source of the Watchdog fires, this Forbidden Window Feature resets the System if WDD equals to WDV.

This Changeset disables the Forbidden Window by setting the WDD Value to the Maximum (0xfff) Value possible.
 2017-04-06 09:43:07 -06:00
Jussi Kivilinna
0aa52d98a2 STM32F7: add warning for RXDMA + IFLOWCONTROL combination 
Combination of RXDMA + IFLOWCONTROL does not work as one might expect.
Since RXDMA uses circular DMA-buffer, DMA will always keep reading new
data from USART peripheral even if DMA buffer underruns. Thus this
combination only does following: RTS is asserted on USART setup and
deasserted on shutdown and does not perform actual RTS flow-control.

Data loss can be demonstrated by doing long up_mdelay inside irq
critical section and feeding data to RXDMA+IFLOWCONTROL UART.
 2017-04-06 08:47:45 -06:00
Jussi Kivilinna
e2702cbe4e STM32F7: fix UART7 and UART8 IFLOWCONTROL options 2017-04-06 08:46:24 -06:00
Jussi Kivilinna
dabf45f100 STM32F7: default CONFIG_STM32F7_DMACAPABLE to 'n'. STM32F7 does not have CCM RAM but DTCM, so this option does not need to enabled. DTCM RAM is DMA-able through CPU AHBS bus. 2017-04-06 08:44:53 -06:00
Jussi Kivilinna
e180522854 stm32f7: serial: add interface to get uart_dev_t by USART number, stm32_serial_get_uart 2017-04-06 08:41:41 -06:00
Alan Carvalho de Assis
95941b4908 STM32: Fix SYSCFG_CFGR1_I2C_PBXFMP_SHIFT value 2017-04-06 08:35:33 -06:00
Masayuki Ishikawa
f5b6ae627d EFM32 I2C: Fix timeout calculation 2017-04-06 17:12:13 +09:00
Simon Piriou
e5c4a28c3a photon: wlan support 2017-04-05 21:55:21 +02:00
Juha Niskanen
3e6b92d5fa tm32: stm32l15xxx_rcc: configure medium performance voltage range and zero wait-state when allowed by SYSCLK setting 
Zero wait-state for flash can be configured when:
 Range 1 and SYSCLK <= 16 Mhz
 Range 2 and SYSCLK <= 8 Mhz
 Range 3 and SYSCLK <= 4.2 Mhz

Medium performance voltage range (1.5V) can be configured when SYSCLK is up to 16 Mhz and PLLVCO up to 48 Mhz.
 2017-04-05 07:41:25 -06:00
Juha Niskanen
bff341fdfc stm32: stm32l15xx_rcc: add support for using MSI as system clock 2017-04-05 07:41:24 -06:00
Juha Niskanen
9a29b9a327 stm32: stm32_flash: add EEPROM writing for STM32L15XX 2017-04-04 07:38:49 -06:00
no1wudi
8fbd8b9e6f STM32:add I2C3 SDA pin mapping for STM32F411 2017-04-04 11:57:45 +08:00
no1wudi
730b674b01 STM32:add I2C3 SDA pin mapping for STM32F411 2017-04-04 11:50:58 +08:00
Juha Niskanen
e320e5c100 STM32: add STM32L162VE to chip.h 2017-04-03 07:59:11 -06:00
Juha Niskanen
3a6bd901e4 stm32: fix IWDG and WWDG debug mode stop for STM32L15XX 2017-04-03 07:45:09 -06:00
Gregory Nutt
fb42844788 STM32: Fix a comment 2017-04-02 12:32:20 -06:00
David Sidrane
97fa617c89 stm32f7:stm32_sdmmc removed stray semicolon 2017-03-31 13:17:34 -10:00
David Sidrane
fbb6cfc79c stm32f7:Serial fix for dropped data 
1) Revert the inherited dma bug from the stm32
     see df9ae3c13f
     for details.

  2) Most all CR1-CR3 settings can not be configured while UE
     is true. Threfore we make all operation atomic and disable
     UE and restore it's originalstate on exit.
 2017-03-31 13:17:34 -10:00
Jussi Kivilinna
41912ed98c STM32F7: add support for LSE RTC and enable RTC subseconds 2017-03-31 10:13:40 -06:00
Gregory Nutt
7b789f57ac Review of previous commit 2017-03-30 12:28:40 -06:00
Konstantin Berezenko
95cbbf552b Change STM32 tickless to use only one timer 2017-03-30 10:40:05 -07:00
Juha Niskanen
5577f58458 STM32 RNG: Fix semaphore initial value and disable priority inheritance 2017-03-29 07:12:19 -06:00
Juha Niskanen
9f3b24a4a1 STM32 F7: add stm32 RNG support. This is copied from stm32l4. Tested on STM32F746ZG board. 2017-03-29 07:08:10 -06:00
Gregory Nutt
92da8068ed Merge branch 'master' of bitbucket.org:nuttx/nuttx 2017-03-26 06:57:35 -06:00
Mateusz Szafoni
62f9ae0852 Merged in raiden00/nuttx (pull request #300) 
STM32 COMP cosmetics

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-26 12:21:32 +00:00
raiden00pl
f3367233b6 stm32_comp.c: typo 2017-03-26 09:36:53 +02:00
raiden00pl
c1090164f5 stm32/Kconfig: update COMP and OPAMP definitions 2017-03-26 09:34:17 +02:00
raiden00pl
6594c65a77 stm32_comp.c: cosmetic 2017-03-26 09:30:23 +02:00
Gregory Nutt
7d57a2b2bd Trivial changes from review of last PR. 2017-03-25 10:38:41 -06:00
Mateusz Szafoni
c174074dd8 Merged in raiden00/nuttx (pull request #299) 
Add COMP character driver

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-25 16:29:02 +00:00
Gregory Nutt
602546f852 Minor typo fix 2017-03-25 10:23:53 -06:00
raiden00pl
a806aedb13 STM32F33: Support for COMP character driver 2017-03-25 16:57:43 +01:00
Alexander Oryshchenko
61ff3c6b84 I needed to use DS3231, I remember that in past it worked ok, but now for stm32f4xx is used another driver (chip specific, stm32f40xxx_i2c.c) and DS3231 driver doesn't work. After investigating a problem I found that I2C driver (isr routine) has a few places there it sends stop bit even if not all messages are managed. So, e.g., removing stm32_i2c_sendstop (#1744) and adding stm32_i2c_sendstart after data reading helps to make DS3231 working. Verified by David Sidrane. 2017-03-24 06:44:33 -06:00
Aleksandr Vyhovanec
82a84a8d98 Merged nuttx/nuttx into master 2017-03-24 11:40:09 +03:00
no1wudi
4c6680df99 Merged in no1wudi/nuttx (pull request #291) 
fix compile error when disabled the flash data cache corruption for stm32 f1xx

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-24 00:58:26 +00:00
no1wudi
fd76a3db05 fix spacing 2017-03-24 08:52:46 +08:00
no1wudi
5797e84893 Merged nuttx/nuttx into master 2017-03-24 08:40:40 +08:00
David Sidrane
66910577be stm322_flash:missing unlock on F1 HSI off path 2017-03-23 14:22:45 -10:00
David Sidrane
7e3bec635b stm32_i2c_alt:Move def of regval to top func def per CS 2017-03-23 11:50:37 -10:00
David Sidrane
d25f8710d2 stm32f40xxx_i2c:Duplicate non CS dev of regval 2017-03-23 11:37:12 -10:00
David Sidrane
f5cf22d871 stm32_i2c_alt:Duplicate non CS dev of regval 2017-03-23 11:36:44 -10:00
David Sidrane
c2a1b719be stm32_flash:Need conditinal on non F4 targets 2017-03-23 11:33:32 -10:00
rg
9353ca6039 STM32 I2C: Do not allow CONFIG_I2C_POLLED and CONFIG_I2C_DMA 2017-03-23 11:24:18 -06:00
Aleksandr Vyhovanec
06af125e45 The interrupt occurs over the counter overflow 2017-03-23 17:34:45 +03:00
no1wudi
45f5d30e2e fix compile error when disabled the flash data cache corruption for stm32 f1xx 2017-03-23 13:38:26 +08:00
David Sidrane
c73b65c9b9 stm32f7:stm32_allocateheap.c There are 5 configurations 2017-03-22 23:56:54 +00:00
Gregory Nutt
3fb0a00c35 Small changes from review of last PR. Plus spacing and typo fix. 2017-03-22 17:32:52 -06:00
Gregory Nutt
947acd6c1a Small changes from review of last PR 2017-03-22 15:53:12 -06:00
José Roberto de Souza
b9b4f184a7 stm32: Add workaround for flash data cache corruption on read-while-write 
This is a know hardware issue on some STM32 see the errata of your model
and if you make use of both memory banks you should enable it.
 2017-03-22 13:14:19 -07:00
José Roberto de Souza
09f70c462d stm32: Make up_progmem thread safe 
Writing to a flash sector while starting the erase of other sector
have a undefined behavior so lets add a semaphore and syncronize
access to Flash registers.

But for the semaphore to work it needs to be initialized so each
board needs call stm32_flash_initialize() on initialization, so
to avoid runtime problems it is only using semaphore and making
it thread safe if initialized, after all boards starts to call
stm32_flash_initialize() we can remove the boolean and the check.
 2017-03-22 13:14:15 -07:00
José Roberto de Souza
80f56e75f9 stm32: Fix erase sector number for microcontrolers with more than 11 sectors 
Erase a sector from the second bank cause the bit 4 of SNB being set
but never unsed, so trying to erase a sector from the first bank
was acually eraseing a sector from the second bank.
 2017-03-22 12:42:20 -07:00
David S. Alessio
7f2c4c4274 XMC4xxx: Add FPU support 2017-03-22 12:04:32 -06:00
Gregory Nutt
3f3aa73b8f XMC4xxx: USIC SCTR register, appears taht both WLE and FLE fields hold value - 1. 2017-03-21 17:51:55 -06:00
Gregory Nutt
ea93357a1e XMC4xxx: Fix a typo in the SCU header file 2017-03-21 17:05:47 -06:00
rg
82a5dfddb4 The attached .patch implements DMA support for the stm32f4 I2C. Max and I have verified that it works on our systems. 2017-03-21 16:44:11 -06:00
Gregory Nutt
343f7ceab2 XMC4xxx: Misc clock clean-up; PBDIV should be controllable from board.h 2017-03-21 15:05:17 -06:00
Gregory Nutt
602bdd13fb XMC4xxx: Fix a pin configuration problem. Fix some mispellings. 2017-03-21 11:24:04 -06:00
Gregory Nutt
21a626878a XMC4xxx: Clean up problems associated with USIC initialization. USIC still does not work in UART mode. 2017-03-21 10:55:52 -06:00
Gregory Nutt
805a4f65e9 XMC4xxx: Fixes to HIB domain setup, GPIO pin configuration. 2017-03-21 09:31:44 -06:00
Gregory Nutt
886dadae0a XMC4xxx: Minor updates to naming and comments 2017-03-20 18:10:23 -06:00
Gregory Nutt
b9e29d1083 XMC4xxx: Clean up memory map 2017-03-20 17:08:09 -06:00
Gregory Nutt
4ba091933e XMC4xxx: Fix for early bringup problems 2017-03-20 16:31:35 -06:00
Gregory Nutt
3a91ba5264 XMC4xxx: Plug last holes to get a first, clean build. 2017-03-20 13:46:02 -06:00
Gregory Nutt
985c137b78 XMC4xxx: Finishes system timer logic. 2017-03-20 13:20:31 -06:00
Gregory Nutt
4519b679af XMC4xxx: Finish code for USIC serial driver. 2017-03-20 12:47:26 -06:00
Gregory Nutt
8a3422f837 XMC4xxx: Complete lowputc logic 2017-03-20 11:25:51 -06:00
no1wudi
7d6ee0f222 fix a typo 2017-03-20 09:50:27 +08:00
Gregory Nutt
5df421488c XMC4xxx: Add USIC baudrate calculation. 2017-03-19 18:11:38 -06:00
Gregory Nutt
ae32905fe8 XMC4xxx: Simply some USIC logic, add USIC interface to disable a channel. Add USIC enable logic to UART configuration (a lot more to do there). 2017-03-19 17:06:44 -06:00
Gregory Nutt
e1e4af7454 XMC4xxx: More Ethernet definitions. 2017-03-19 16:25:46 -06:00
Gregory Nutt
c023d41522 XMC4xxx: Beginning of Ethernet register header file 2017-03-19 13:47:27 -06:00
Gregory Nutt
e8a30890f2 Cosmetic changes from review of last PR. 2017-03-19 13:05:31 -06:00
Mateusz Szafoni
9f699e6715 Merged in raiden00/nuttx (pull request #281) 
STM32F3: Add COMP support

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-19 18:55:06 +00:00
Gregory Nutt
5c0be816a5 XMC4xxx: Add commin USIC support logic for use in all USIC configurations. 2017-03-19 12:48:37 -06:00
raiden00pl
651b8360c6 STM32F33: Add COMP support 2017-03-19 18:36:44 +01:00
raiden00pl
c760d00158 stm32f33xx_comp.h: fix typos 2017-03-19 18:27:31 +01:00
Gregory Nutt
59b9ef8fdc XMC4xxx: Revise configuration for USICs. Three USICs but 4 UARTs possible with each channel of USIC. 2017-03-19 11:10:31 -06:00
Gregory Nutt
a9aa11f968 XMC4xxx: A few compilation issues; still a long way to go. 2017-03-19 10:03:31 -06:00
Gregory Nutt
064ae17af5 XMC4xxx: Finishes UIC register definition header file. 2017-03-19 09:46:57 -06:00
Gregory Nutt
9110b7d45c XMC4xxxx: Add more definitions to USIC register definition header. 2017-03-19 08:44:28 -06:00
Gregory Nutt
6b5dc49573 XMC4xxx: Flesh out USIC header file. Still needs a little work. 2017-03-18 19:16:29 -06:00
Gregory Nutt
47cd105e32 XMC4xxxx: Final clean-up of SCU heder file 2017-03-18 16:41:33 -06:00
Gregory Nutt
e82a3b3ca7 XMC4xxx: Completes most SCU register definitions. 2017-03-18 16:13:59 -06:00
Gregory Nutt
301e70b073 XMC4xxx: A few more SCU register definitions. 2017-03-18 15:19:02 -06:00
Gregory Nutt
7706810fc0 XMC4xxx: A few more SCU register definitions. 2017-03-18 14:08:35 -06:00
Gregory Nutt
cfa75de85a XMC4xxx: A few more SCU register definitions. 2017-03-18 13:09:07 -06:00
Mateusz Szafoni
5907ec8cf9 Merged in raiden00/nuttx (pull request #279) 
STM32F33: Move DMA logic to a separate files + add ADC support

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-18 17:54:19 +00:00
Gregory Nutt
9769c67d4d XMC4xxx: Add pin multiplexing header file. 2017-03-18 11:25:14 -06:00
raiden00pl
fd42900dcc STM32F33: Add ADC support 2017-03-18 16:34:24 +01:00
raiden00pl
49e4e62aab STM32F33: Move DMA logic to a separate files 2017-03-18 16:31:06 +01:00
Gregory Nutt
3f0c4871c8 Merge remote-tracking branch 'origin/master' into xmc4 2017-03-18 06:48:37 -06:00
David Cabecinhas
148e74fd10 Merged in dcabecinhas/nuttx/fix_intstack_allocation (pull request #270) 
ARM: Fix off-by-one interrupt stack allocation (revert missed change in up_initialize.c)

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-18 12:25:18 +00:00
Gregory Nutt
c6d5d3bded XMC4xxx: All register definition files need to include memorymap.h 2017-03-17 16:44:26 -06:00
Gregory Nutt
7bde01df98 XMC4C: Clean up some naming, fix some comments, add empty PINMUX header file. 2017-03-17 16:40:29 -06:00
Gregory Nutt
5ae9564b7d XMC4xxx: GPIO write should use OMR, not OUTPUT register. 2017-03-17 16:26:11 -06:00
Gregory Nutt
8bfb735351 XMC4xxx: Finishes implementation of GPIO support. 2017-03-17 13:02:07 -06:00
Gregory Nutt
41758d8e4c XMC4xxx: minor update to GPIO definitions. 2017-03-17 11:22:42 -06:00
Gregory Nutt
d2d54b4ae7 XMC4xxx: Add framework and definitions for GPIO support 2017-03-17 11:18:24 -06:00
Gregory Nutt
042b33414a XMC4xxx: Missing OMR field in PORT register definition header file. 2017-03-17 08:28:40 -06:00
Gregory Nutt
f672478e7e XMC4xxx: Completes the PORT register definition header file. 2017-03-17 08:12:21 -06:00
Gregory Nutt
6b167122c0 XMC4xxx: Move clock utility functions from xmc4_clocconfig.c to new xmc4_clockutils.c 2017-03-16 14:26:22 -06:00
Gregory Nutt
e30e47683b XMC4xxx: Add partial PORTS header file. 2017-03-16 13:24:32 -06:00
Gregory Nutt
e67baffc15 XMC4xxx: Add partial USIC header file. 2017-03-16 13:04:01 -06:00
Gregory Nutt
5693f26a5e XMC4xx: Fix several early compilation problems. 2017-03-16 11:30:02 -06:00
Gregory Nutt
fe610e7a1d XMC4500 Relax: Add basic board support infrastructure of Infineon XMC4500 Relax Lite v1 2017-03-16 10:52:01 -06:00
Gregory Nutt
66d001d0e1 XMC4xxx: Initial clock configuration logic. 2017-03-16 09:48:57 -06:00
no1wudi
812578c066 Merge branch 'master' of https://bitbucket.org/nuttx/nuttx 2017-03-16 23:07:38 +08:00
no1wudi
c613a360a3 Merge branch 'master' of https://bitbucket.org/no1wudi/nuttx 2017-03-16 23:06:54 +08:00
no1wudi
1280c91564 fixed descritpions of NUC100/120 2017-03-16 23:04:52 +08:00
David Cabecinhas
4b65817e99 ARM: Set EABI stack alignment for all ARM architectures (remove OABI code) 2017-03-16 19:58:50 +08:00
David Cabecinhas
08e92abb0b ARM: Remove redundant interrupt stack coloring 2017-03-16 19:13:39 +08:00
Gregory Nutt
059e398185 XMC4xxx: A few more SCU register bit definitions. 2017-03-15 18:50:48 -06:00
Gregory Nutt
450d747265 Merge remote-tracking branch 'origin/master' into xmc4 2017-03-15 13:10:17 -06:00
Gregory Nutt
519f14fbb5 XMC4xxx: A few more SCU register bit definitions. 2017-03-15 11:43:58 -06:00
Gregory Nutt
77f244ed7b XMC4xx: Add logic to get the CPU frequency. 2017-03-15 10:22:24 -06:00
Gregory Nutt
772b3cf21b XMC4xxx: Add Peripheral Memory Map header file. 2017-03-14 19:07:19 -06:00
Gregory Nutt
a635e7df7a XMC4xxx: Add SCU header file. 2017-03-14 16:19:30 -06:00
Simon Piriou
bf9391a1fe photon: porting wlan device 2017-03-14 21:13:36 +01:00
Gregory Nutt
2430049e3b arch/arm/include/xmc4: More support for Infineon XMC4xxx arch. Still incomplete. 2017-03-14 13:04:09 -06:00
Gregory Nutt
dc4ac48aad arch/arm/src/xmc4: Initial, partial support for Infineon XMC4xxx 2017-03-14 11:56:29 -06:00
Gregory Nutt
240d1e9b3b Update some comments 2017-03-14 11:39:10 -06:00
Gregory Nutt
c97581e99b Update some comments 2017-03-14 11:16:35 -06:00
Gregory Nutt
4a93b0dc0c Update comments. 2017-03-14 08:44:56 -06:00
David
33f7bfa351 ARM: Fix off-by-one interrupt stack allocation (revert missed change in up_initialize.c) 2017-03-14 21:01:44 +08:00
David Cabecinhas
86400a252d ARM: Fix off-by-one interrupt stack allocation in 8-byte aligned architectures 2017-03-14 20:01:45 +08:00
Gregory Nutt
4d33f26717 Update some comments 2017-03-12 12:33:44 -06:00
Gregory Nutt
d9cdb6c383 STM32; OTG host implementations of stm32_in_transfer() must obey the polling interval for the case of isochronous and itnerrupt endpoints. 2017-03-12 08:39:30 -06:00
Gregory Nutt
98a98a0c8b Minor change for consistency with a previous commit. 2017-03-12 07:20:10 -06:00
Gregory Nutt
9b11187b2a STM32 OTG HS: A little research reveals that only the F2 RCC initialization set the OTGHSULPIEN bit and Photon is the only F2 board configuration that uses OTG . Therefore, we can simplify the conditional logic of the last PR. Negative logic was used (#ifndef BOARD_DISABLE_USBOTG_HSULPI) to prevent bad settings in other configurations. But give these facts, the preferred positive logic now makes more sense (#ifdef BOARD_ENABLE_USBOTG_HSULPI). 2017-03-11 18:00:38 -06:00
Gregory Nutt
e0f7b9582a STM32: Review of last STM32 F2 PR. Progate changes to STM32 F4 and F7 OTGHS. Rename some configs/photon/src files. Naming can be either photon_ or stm32_ but must be consistent. 2017-03-11 16:31:11 -06:00
Simon Piriou
11876dc090 Merged in spiriou/nuttx/usb_fix (pull request #265) 
stm32f20xxx: add BOARD_DISABLE_USBOTG_HSULPI flag

Approved-by: Gregory Nutt
 2017-03-11 22:04:51 +00:00
Simon Piriou
70d8f0189d stm32f20xxx: add BOARD_DISABLE_USBOTG_HSULPI flag 2017-03-11 18:15:18 +01:00
David Sidrane
cdfc158f90 up_initialize.c edited online with Bitbucket 2017-03-11 15:40:48 +00:00
David Sidrane
c9ecb3c378 As discovered by dcabecinhas. This fix assume the 8 byte alignment options for size stack size or this will overwrite the first word after TOS 
See https://github.com/PX4/Firmware/issues/6613#issuecomment-285869778
 2017-03-11 15:35:03 +00:00
Gregory Nutt
aadf6c6e16 STM32 F33: Fix another error in ADC base address usage. 2017-03-10 17:49:32 -06:00
Gregory Nutt
852b189910 STM32 F33 ADC: Correct bad definitions of base addresses; Fix naming collision by changing colliding STM32_ADC12_BASE to STM32_ADC12_CMN_BASE 2017-03-10 17:46:19 -06:00
Gregory Nutt
24816cb08b All STM32 host drivers. In IN endpoint retry, delay for a clock tick to give some breathing space for the CPU. EXPERIMENTAL change. 2017-03-10 10:25:43 -06:00
David Sidrane
2baffab16e WS 2017-03-10 15:42:59 +00:00
David Sidrane
acaebb361b STM32, STM32 F7, and STM32 L4: Clone Freddie Chopin's I2C change to similar STM32 I2C drivers. 
Save elapsed time before handling I2C in stm32_i2c_sem_waitstop()
   This patch follows the same logic as in previous fix to
   stm32_i2c_sem_waitdone().
   It is possible that a context switch occurs after I2C registers are read
   but before elapsed time is saved in stm32_i2c_sem_waitstop(). It is then
   possible that the registers were read only once with "elapsed time"
   equal 0. When scheduler resumes this thread it is quite possible that
   now "elapsed time" will be well above timeout threshold. In that case
   the function returns and reports a timeout, even though the registers
   were not read "recently".
   Fix this by inverting the order of operations in the loop - save elapsed
   time before reading registers. This way a context switch anywhere in the
   loop will not cause an erroneous "timeout" error.
 2017-03-10 05:07:39 -10:00
Freddie Chopin
3cd66af889 ave elapsed time before handling I2C in stm32_i2c_sem_waitstop() 
This patch follows the same logic as in previous fix to
stm32_i2c_sem_waitdone().

It is possible that a context switch occurs after I2C registers are read
but before elapsed time is saved in stm32_i2c_sem_waitstop(). It is then
possible that the registers were read only once with "elapsed time"
equal 0. When scheduler resumes this thread it is quite possible that
now "elapsed time" will be well above timeout threshold. In that case
the function returns and reports a timeout, even though the registers
were not read "recently".

Fix this by inverting the order of operations in the loop - save elapsed
time before reading registers. This way a context switch anywhere in the
loop will not cause an erroneous "timeout" error.
 2017-03-10 07:35:10 -06:00
Gregory Nutt
9cd3f7f80a STM32, STM32 F7, STM32 L4: OTG host drivers: Do not do data toggle if interrupt transfer is NAKed. Sugested by webbbn@gmail.com 2017-03-09 15:07:31 -06:00
Simon Piriou
6768831851 Merged in spiriou/nuttx (pull request #257) 
STM32F2: add USB OTG HS support for stm32f20xxx cores

Approved-by: Gregory Nutt
 2017-03-09 20:06:12 +00:00
Gregory Nutt
04297d1b0f Update some comments 2017-03-09 13:57:37 -06:00
Gregory Nutt
a3b4475474 STM32, STM32 F7, and STM32 L4: Back out part of 3331e9c49a. Returning immediately int he case of a NAK makes the Mass Storage Class driver unreliable. The retry/timeout logic is necessary. This implementation tries to implement a compromise: If a NAK is received after some data is received, then the partial data received is returned as with 3331e9c49a. If if a NAK is received with no data, then no longer returns the NAK error immediately but retries until data is received or a timeout occurs. Initial testing indicates that this fixes the issues the MSC. However, I hae concerns that if multiple sectors are read in one transfer, there could be NAKs between sectors as well and, in that case, then change will still cause failures. 2017-03-09 13:49:25 -06:00
Simon Piriou
31aef4a9c0 STM32F2: add USB OTG HS support for stm32f20xxx cores 2017-03-09 20:30:32 +01:00
David Sidrane
c8efeecfda Merged in david_s5/nuttx/upstream_kinetis (pull request #256) 
Kinetis:Allow Board to add Pullups on SDHC lines

Approved-by: Gregory Nutt
 2017-03-09 15:34:12 +00:00
David Sidrane
2700fd9e81 Kinetis:Allow Board to add Pullups on SDHC lines 2017-03-09 05:30:02 -10:00
Gregory Nutt
ee5ae3a57d STM32, STM32 F7, and STM32 L4: Clone Freddie Chopin's I2C change to similar STM32 I2C drivers. 2017-03-09 07:37:52 -06:00
Freddie Chopin
5a6d95dd9f ave elapsed time before handling I2C in stm32_i2c_sem_waitdone() 
It is possible that a context switch occurs after stm32_i2c_isr() call
but before elapsed time is saved in stm32_i2c_sem_waitdone(). It is then
possible that the handling code was executed only once with "elapsed
time" equal 0. When scheduler resumes this thread it is quite possible
that now "elapsed time" will be well above timeout threshold. In that
case the function returns and reports a timeout, even though the
handling code was not executed "recently".

Fix this by inverting the order of operations in the loop - save elapsed
time before handling I2C. This way a context switch anywhere in the loop
will not cause an erroneous "timeout" error.
 2017-03-09 07:29:12 -06:00
Gregory Nutt
92858d1096 Cosmetic changes from review of a previous PR 2017-03-09 07:00:44 -06:00
Andreas Bihlmaier
d5cb3f5a32 Merged in andreasBihlmaier/nuttx/fixes-lpc43_ssp (pull request #253) 
actually write modified value to register

Approved-by: Gregory Nutt
 2017-03-09 12:54:47 +00:00
Andreas Bihlmaier
ce908cec9c Merged in andreasBihlmaier/nuttx/fixes-lpc43_i2c (pull request #252) 
use correct macro for irqid (fortunately both point to LPC43_IRQ_EXTINT+18)

Approved-by: Gregory Nutt
 2017-03-09 12:53:56 +00:00
Andreas Bihlmaier
55bd808dcc Merged in andreasBihlmaier/nuttx/fixes-lpc43_ethernet (pull request #251) 
fix logic in preprocessor checks and correct arguments to lpc43_pin_config initialization

Approved-by: Gregory Nutt
 2017-03-09 12:53:22 +00:00
Andreas Bihlmaier
1c5ededc48 Merged in andreasBihlmaier/nuttx/fixes-lpc43_adc (pull request #250) 
fix logic error in lpc43_adc

Approved-by: Gregory Nutt
 2017-03-09 12:52:33 +00:00
Andreas Bihlmaier
871756b6c0 Merged in andreasBihlmaier/nuttx/fixes-lpc43_sct_and_sgpio_headers (pull request #249) 
Fix errors in LPC43 SCT and SGPIO headers.

Approved-by: Gregory Nutt
 2017-03-09 12:52:03 +00:00
Andreas Bihlmaier
be90fbd1a1 Merged in andreasBihlmaier/nuttx/fixes-lpc43_gpdma (pull request #248) 
rename LPC43_GPDMA_GLOBAL_CONFIG (already slipped previous commit C file); fix GPDMA_CONTROL_SBSIZE_*, improve usability of GPDMA_CONTROL_{S,D} macros

Approved-by: Gregory Nutt
 2017-03-09 12:51:20 +00:00
Andreas Bihlmaier
9227947543 Merged in andreasBihlmaier/nuttx/fixes-lpc4310203050_pinconfig (pull request #247) 
add missing PINCONF_INBUFFER in several places of lpc4310203050_pinconfig.h

Approved-by: Gregory Nutt
 2017-03-09 12:50:45 +00:00
Andreas Bihlmaier
9ba4ce0bb9 Merged in andreasBihlmaier/nuttx/change-adc0_mask (pull request #246) 
change Kconfig type of ADC0_MASK from hex to int; add ADC driver options to lpc43xx

Approved-by: Gregory Nutt
 2017-03-09 12:49:58 +00:00
ahb
7835e5bde8 actually write modified value to register 2017-03-09 11:33:09 +01:00
ahb
0dee37ffb3 use correct macro for irqid (fortunately both point to LPC43_IRQ_EXTINT+18) 2017-03-09 11:29:01 +01:00
ahb
f34d0382c3 fix logic in preprocessor checks and correct arguments to lpc43_pin_config initialization 2017-03-09 11:23:35 +01:00
ahb
e0a8d61804 fix logic error in lpc43_adc 2017-03-09 11:17:11 +01:00
ahb
9b023049a2 Fix errors in LPC43 SCT and SGPIO headers. 
Note: This has already been tested. However, I have to significantly clean up the actual drivers (C files) before committing them, too.
 2017-03-09 11:11:57 +01:00
ahb
aa92e14512 rename LPC43_GPDMA_GLOBAL_CONFIG (already slipped previous commit C file); fix GPDMA_CONTROL_SBSIZE_*, improve usability of GPDMA_CONTROL_{S,D} macros 2017-03-09 11:05:20 +01:00
ahb
41c79c431b add missing PINCONF_INBUFFER in several places of lpc4310203050_pinconfig.h 2017-03-09 10:48:25 +01:00
ahb
5bfa42c1b8 change Kconfig type of ADC0_MASK from hex to int; add ADC driver options to lpc43xx 2017-03-09 10:41:59 +01:00
ahb
67c86e5aa9 add LPC4337FET256 2017-03-09 10:30:28 +01:00
David Sidrane
45ccf0cb79 Merged in david_s5/nuttx/upstream_kinetis (pull request #243) 
Ensure interrups are back on BEFORE running code dependant on clock_systimer

Approved-by: Gregory Nutt
 2017-03-08 22:24:28 +00:00
David Sidrane
5158af0da6 Ensure interrups are back in BEFORE running code dependant on clock_systimer 2017-03-08 11:46:00 -10:00
David Sidrane
ab2337fa4b Merged in david_s5/nuttx/upstream_kinetis (pull request #242) 
Kinetis:Fixed GPIO _PIN_OUTPUT_LOWDRIVE swapped with _PIN_OUTPUT_OPENDRAIN

Approved-by: Gregory Nutt
 2017-03-08 19:30:31 +00:00
David Sidrane
7ad9c7c6e8 Kinetis:Fixed GPIO _PIN_OUTPUT_LOWDRIVE swapped with _PIN_OUTPUT_OPENDRAIN 2017-03-08 09:13:02 -10:00
Andreas Bihlmaier
2ccd480e90 Merged in andreasBihlmaier/nuttx (pull request #240) 
fix lpc43_gpdma, largely typos

Approved-by: Gregory Nutt
 2017-03-07 13:35:38 +00:00
Gregory Nutt
0631c1aafa STM32 OTGFS, STM32 L4 and F7: Adapt Janne Rosberg's patch to STM32 OTGHS host to OTGFS host, and to similar implements for L4 and F7. 2017-03-07 07:17:24 -06:00
Janne Rosberg
3331e9c49a STM32 OTGHS host: stm32_in_transfer() fails and returns NAK if a short transfer is received. This causes problems from class drivers like CDC/ACM where short packets are expected. In those protocols, any transfer may be terminated by sending short or NUL packet. 2017-03-07 06:58:59 -06:00
ahb
073b3d2c9a fix lpc43_gpdma, largely typos 2017-03-07 11:16:08 +01:00
David Sidrane
940fefeb8a Fixed #if defined 2017-03-06 19:28:27 +00:00
Gregory Nutt
ba67eb742e STM32L4: Remove warning. Remove unused variable. 2017-03-05 14:21:00 -06:00
Gregory Nutt
464a3cf27c Kinetis: Eliminate warning when USE_EARLYSERIALINIT is not defined 2017-03-05 14:06:20 -06:00
Gregory Nutt
d3408809e4 sendfile(): Fix error introduced with commit ff73be870e. Noted by Maciej Wójcik 2017-03-05 11:50:34 -06:00
raiden00pl
e9884216c5 stm32f33xxx: Add HRTIM header file 2017-03-05 18:10:59 +01:00
Gregory Nutt
810fe33c3c STM32 F7 SDMMC: Use new interrupt argument facility. 2017-03-05 10:56:45 -06:00
raiden00pl
46d62b1e09 stm32f33xxx: Add ADC header file 2017-03-04 19:40:14 +01:00
raiden00pl
b866ea0dd0 stm32f33xxx_memorymap.h: Add COMP and OPAMP base adress 2017-03-04 19:36:56 +01:00
raiden00pl
a14ed630e8 stm32f33xxx: Add COMP header file 2017-03-04 19:35:17 +01:00
raiden00pl
da3dd1d69c stm32f33xxx: Add OPAMP header file 2017-03-04 19:32:50 +01:00
raiden00pl
3e3a13b4b0 stm32f33xxx: Add DAC header file 2017-03-04 19:30:08 +01:00
raiden00pl
71b0127bc1 chip/stm32_dac.h: fix typo 2017-03-04 19:23:33 +01:00
HuangQi
6febad2f2c fixed a typo 2017-03-04 11:26:22 +08:00
Gregory Nutt
d3c29a15d1 Remove unused variable warning. 2017-03-03 19:19:56 -06:00
Gregory Nutt
0f25b0a9f1 Correct a typo 2017-03-03 17:02:20 -06:00
Gregory Nutt
210896438c Kinetis PIN IRQ needs errno.h 2017-03-03 15:30:16 -06:00
Gregory Nutt
7bb19ad8bc STM32 Ethernet: Remove unused variable warning. 2017-03-03 15:24:00 -06:00
Gregory Nutt
8353ddbef4 STM32 L4 Serial: Ooops unmatched parenthesis 2017-03-03 15:18:09 -06:00
Gregory Nutt
9a33f41180 Kinetis PINIRQ: Improper type for return value. 2017-03-03 15:09:44 -06:00
Gregory Nutt
86239d4a73 Experimental change to STM32 Ethernet driver a success. Porting change to all other Ethernet drivers. 2017-03-03 14:45:09 -06:00
Gregory Nutt
f4bad1a280 stm32_gpiosetevent: GPIO IRQ logic no longer returns the xcpt_t oldhandler. This value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 16:34:37 -06:00
Gregory Nutt
4a4636c8a1 Tiva: Pin IRQ logic no longer returns the xcpt_t oldhandler. There value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 12:58:00 -06:00
Gregory Nutt
7982b45367 STM32 L4: Pin IRQ logic no longer returns the xcpt_t oldhandler. There value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 12:36:40 -06:00
Gregory Nutt
32383556fd PIC32MZ: Pin IRQ logic no longer returns the xcpt_t oldhandler. There value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 12:23:45 -06:00
Gregory Nutt
1564b384e1 PIC32MX: Pin IRQ logic no longer returns the xcpt_t oldhandler. There value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 12:10:05 -06:00
Gregory Nutt
edbc0eaace Kinetis-L GPIO: Pin IRQ logic no longer returns the xcpt_t oldhandler. There value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 11:55:26 -06:00
Gregory Nutt
c7943586d8 STM32 Ethernet: Need two work structures so that pending poll work is not lost when an interrupt occurs. 2017-03-02 11:40:12 -06:00
Gregory Nutt
34a2839244 Kinetis GPIO: Pin IRQ logic no longer returns the xcpt_t oldhandler. There value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 11:33:03 -06:00
Gregory Nutt
28d3344ac2 STM32/F7/L4: EXTI ALARM function no longer returns the xcpt_t oldhandler. There value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 09:18:10 -06:00
Gregory Nutt
d5e04a8c43 STM3 L4: EXTI COMP function no longer returns the xcpt_t oldhandler. There value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 09:03:12 -06:00
Gregory Nutt
89058172f1 STM32/F7/L4: EXOT PVD function no longer returns the xcpt_t oldhandler. There value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 08:56:31 -06:00
Gregory Nutt
f5f9d82d5a arch_phy_irq: Now returns int instead of xcpt_t oldhandler. The oldhandler is useless after the changes to the interrupt argument. Also access an argument for the PHY interrupt. phy_notify.c driver changed to exploit new interrupt argument passing. 2017-03-02 08:43:33 -06:00
Gregory Nutt
094795e0ed Review parameter usage in sigtimedwait(); update some comments. 2017-03-02 06:39:05 -06:00
Mark Schulte
df0a05c682 Fix function signature for irq handler 2017-03-01 08:54:16 -06:00
Mark Schulte
4761a7d816 Add argument to timer irq callback 2017-03-01 08:49:14 -06:00
Mark Schulte
27c3c2605c Add argument to capture irq callback 2017-03-01 08:45:27 -06:00
Gregory Nutt
5987db47e5 Changes from review of last PR 2017-02-28 18:42:21 -06:00
David Sidrane
7c726e43a5 Merged in david_s5/nuttx/upstream_stm32f7_irqfixes (pull request #229) 
More build fiexes stm32f7 irqfixes

Approved-by: Gregory Nutt
 2017-03-01 00:38:03 +00:00
Gregory Nutt
ac6e552ff7 Fixes for coding standard: '*' needs to 'snuggle' with following variable name 2017-02-28 18:37:44 -06:00
David Sidrane
2ee99c9d4e STM32F7:stm32_tim irq fixes 2017-02-28 14:29:06 -10:00
Gregory Nutt
ded155c638 Fixes for coding standard: '*' needs to 'snuggle' with following variable name 2017-02-28 18:22:58 -06:00
Gregory Nutt
02b1e1ec1a Fixes for coding standard: '*' needs to 'snuggle' with following variable name 2017-02-28 18:22:57 -06:00
David Sidrane
964a1abada stm32f7:stm32_sdmmc irq fixes 2017-02-28 14:20:45 -10:00
David Sidrane
30c5e78d8f stm32f7:stm32_exti_pwr irq fixes 2017-02-28 14:20:19 -10:00
David Sidrane
ead561d684 Kinetis:kinetis_lpserial.c irq fix typeo 2017-02-28 23:12:56 +00:00
Gregory Nutt
095411859e Fix another old interrupt handler function prototype 2017-02-28 14:00:31 -06:00
Gregory Nutt
fc79762e11 Fix a warning due to a naming collision 2017-02-28 13:36:56 -06:00
Gregory Nutt
70182bf690 Fix more problems found in build testing. 2017-02-28 11:34:03 -06:00
Gregory Nutt
1c8d3e1f14 STM32 F7: Fix errors related to GPIO EXTI 2017-02-28 11:30:54 -06:00
Gregory Nutt
a19b39a9e3 EFM32 Serial: Convert to use new interrupt argument interface. 2017-02-28 11:24:06 -06:00
Gregory Nutt
ac7307cca0 Trivial, cosmetic changes from review. 2017-02-28 11:11:11 -06:00
David Sidrane
d75dfcfb4b Merged in david_s5/nuttx/upstream_irqfixes (pull request #227) 
STM32 irqfixes found in build testing

Approved-by: Gregory Nutt
 2017-02-28 17:08:21 +00:00
David Sidrane
c8ac29574b STM32:stm32_wwd Fixed irq interface 2017-02-28 07:04:47 -10:00
David Sidrane
6443aec36b STM32:stm32_sdio Fixed irq interface 2017-02-28 07:04:34 -10:00
Gregory Nutt
813dc90505 STM32 L4 Serial: Convert to use new interrupt argument interface. 2017-02-28 11:02:09 -06:00
Gregory Nutt
61639c1aa3 STM32 F7 Serial: Convert to use new interrupt argument interface. 2017-02-28 10:58:22 -06:00
Gregory Nutt
17af125390 STM32 Serial: Convert to use new interrupt argument interface. 2017-02-28 10:54:31 -06:00
Gregory Nutt
dc93340a01 Convert more drivers to use new interrupt argument structure. 2017-02-28 09:29:09 -06:00
Gregory Nutt
370e188fa3 Convert more drivers to use new interrupt argument structure. 2017-02-28 09:05:01 -06:00
Gregory Nutt
ea1e6abfd7 Fix error found in build testing. 2017-02-28 08:41:44 -06:00
Gregory Nutt
7d24f45c7e STM32 1wire: Convert to use new interrupt argument infrastructure. 2017-02-28 08:39:02 -06:00
Gregory Nutt
efd11ebe35 Fixes from build testing 2017-02-28 08:33:52 -06:00
Gregory Nutt
c62180732e Adapt more drivers to utilize the IRQ argument feature. 2017-02-28 07:19:55 -06:00
Gregory Nutt
7d2d541c70 Adapt some drivers to utilize the IRQ argument feature. 2017-02-27 20:54:18 -06:00
Gregory Nutt
704df7bd39 IRQ arguments: Fix errors discovered in build testing 2017-02-27 19:28:24 -06:00
Gregory Nutt
f700e7b241 Merge remote-tracking branch 'origin/master' into irqattach 2017-02-27 18:58:34 -06:00
David Sidrane
d4963c2580 Merged in david_s5/nuttx/upstream_upstream_kinetis_usb (pull request #226) 
kinetis usb clean up

Approved-by: Gregory Nutt
 2017-02-28 00:54:04 +00:00
David Sidrane
0b637ddfb3 Kinetis:Define uart and lpuart versions of [early]serialinit 
Add serial init to centralize UART/LPUART management
   Use kinetis_ not up_ where arch specific
   Defined kinetis_[lp]uart_[early]serialinit to facilitate
    bring up both UARTs and LPUARTs as devices and a console

   Support ordering and merging of serial devices names.
 2017-02-27 14:27:31 -10:00
David Sidrane
d0c58fffb3 Kinetis:Refactor clocking in kinetis_usbdev 
1) Removed SIM_CLKDIV2[USBFRAC, USBDIV] setting as it is now
     done in kinetis_clockconfig
  2) Use BOARD_USB_CLKSRC to select the clock source to the
     USB block
  3) Removed warning
  4) Removed CONFIG_TEENSY_3X_OVERCLOCK from the driver as
     the board.h will now provide BOARD_SIM_CLKDIV2_USBDIV
     and BOARD_SIM_CLKDIV2_USBFRAC to the kinetis_clockconfig
 2017-02-27 13:13:24 -10:00
David Sidrane
1c518b223d Kinetis:Add the configuring SIM_CLKDIV2[USBFRAC, USBDIV] in kinetis_clockconfig 
If a board.h provides BOARD_SIM_CLKDIV2_FREQ it will configure the
  SIM_CLKDIV2 based on the additional provided
  BOARD_SIM_CLKDIV2_USBFRAC and BOARD_SIM_CLKDIV2_USBDIV

  The reason for doing this globaly is that the output the
  SIM_CLKDIV2 divisor may be also used for other IP blocks in
  future configurations (as is done for SIM_CLKDIV3)
 2017-02-27 13:06:01 -10:00
David Sidrane
b9dcedf289 Kinetis:Fixed unused warning 2017-02-27 11:22:49 -10:00
David Sidrane
4bdf732fc7 Kinetis:Fixed kinetis_uartreset call in kinetis_lpserial.c 2017-02-27 11:22:49 -10:00
Gregory Nutt
95856946d2 Interrupt argument bugfixes 2017-02-27 15:22:35 -06:00
Gregory Nutt
80dba27434 Fix copy past type: xcptr_t -> xcpt_t 2017-02-27 15:00:42 -06:00
Gregory Nutt
2ef4433220 Missing interrupt argument parameter. 2017-02-27 14:53:37 -06:00
Gregory Nutt
44abbe60aa Fix typo in name of callback field. 2017-02-27 14:51:29 -06:00
Gregory Nutt
aa8d4422a5 Fix some mismatched function prototypes 2017-02-27 14:43:10 -06:00
Gregory Nutt
d9fec7fe4c More missing arguments to interrupt handling. 2017-02-27 14:26:04 -06:00
Gregory Nutt
67de2e5f66 Add argument to STM32 EXTI interrupt handlers. 2017-02-27 14:21:30 -06:00
David Sidrane
3ae4183971 Kinetis:Fixed C&P of stm32 on kinetis_fpuconfig 2017-02-27 09:12:39 -10:00
David Sidrane
ddb00217be Kinetis:Fixed up_rxint - did not disable the RX interuppts 
There was an OR where and AND NOT was needed.
 2017-02-27 07:19:19 -10:00
Gregory Nutt
7e8e869352 Add more missing arguments to interrupt handling functions. 2017-02-27 11:14:21 -06:00
Gregory Nutt
6a3add7230 STM32 TIM: Correct function prototype. 2017-02-27 11:03:10 -06:00
Gregory Nutt
a581e9206d Convert remaining serial drivers to use use irq_attach. 2017-02-27 10:27:14 -06:00
Gregory Nutt
e5be4f7fe2 Merge remote-tracking branch 'origin/master' into irqattach 2017-02-27 09:13:41 -06:00
Gregory Nutt
221c94e568 Fix typo from a previouis commit 2017-02-27 08:57:21 -06:00
Gregory Nutt
4cd31be19d Convert some serial drivers to use use irq_attach. 2017-02-27 08:55:21 -06:00
Gregory Nutt
b651e73057 STM32: Fix mismatched prototype 2017-02-27 08:18:37 -06:00
Gregory Nutt
2321560690 More missing argument paramters in interrupt handlers. 2017-02-27 08:06:07 -06:00
Gregory Nutt
2e30b9b252 More missing argument paramters in interrupt handlers. 2017-02-27 07:46:36 -06:00
Gregory Nutt
70532f6548 Kinetis: More needed in last pinirq change. 2017-02-27 07:24:57 -06:00
Gregory Nutt
6e2ee2b07f Kinetis: GPIO interrupt handling needs handler argument. 2017-02-27 07:20:21 -06:00
Mark Schulte
b3222bbc8a irq_dispatch: Add argument pointer to irq_dispatch 
Provide a user defined callback context for irq's, such that when
registering a callback users can provide a pointer that will get
passed back when the isr is called.
 2017-02-27 06:27:56 -06:00
Gregory Nutt
433ed93aa0 Add some comments. 2017-02-27 06:25:31 -06:00
Gregory Nutt
1ed7bec85f Merge branch 'master' of bitbucket.org:nuttx/nuttx 2017-02-26 14:53:48 -06:00
Gregory Nutt
bca0adec2b Update comments in file headers. 2017-02-26 14:40:57 -06:00
Wolfgang Reißnegger
774346ccdd SAM3/4: GPIO bit numbering typo fixes. 2017-02-26 09:54:04 -08:00
Gregory Nutt
2e0ffc0ea3 Update some comments. 2017-02-26 09:15:57 -06:00
raiden00pl
3175b74428 Add basic support for the STM32F334 2017-02-26 12:39:44 +01:00
Gregory Nutt
2238912507 Fix some backward conditional compilation 2017-02-25 18:32:58 -06:00
Gregory Nutt
abfb070ee1 Kinetis: Try to make UART/LPUART definitions sane. 2017-02-25 17:48:05 -06:00
Gregory Nutt
27cac7f083 Fix error in last commit: defined, not define in conditional logic. 2017-02-25 16:44:27 -06:00
Gregory Nutt
1e1714b061 Kinetis: Resolve issue with duplicate definitions of up_putc. Addition conditional logic to pick just one. 2017-02-25 16:36:47 -06:00
Gregory Nutt
b6f5b77f2c Add C files that reference ANIOC_TRIGGER now need to include nuttx/analog/ioctl.h 2017-02-25 15:54:10 -06:00
Gregory Nutt
ee2f71ad3e Kinetis USBDEV: Eliminate compilation error introduced by last SIM changes. 2017-02-25 13:26:53 -06:00
Gregory Nutt
48bc77ee6b Update some comments. 2017-02-25 12:40:30 -06:00
Gregory Nutt
04ea69c32f Kinetis: Fix some comple errors and warnings that came in with the last PR 2017-02-25 11:52:31 -06:00
Gregory Nutt
90e63ba18e Purely cosmetic changes from review of last PR. 2017-02-25 11:43:05 -06:00
David Sidrane
38df949adc Merged in david_s5/nuttx/upstream_kinetis (pull request #221) 
Kinetis:Add LPUART

Approved-by: Gregory Nutt
 2017-02-25 17:23:04 +00:00
Gregory Nutt
d77d322a61 QEncoder: Add mechanism to assure that architecture-specific IOCTL commands do not overlap. 2017-02-25 11:15:59 -06:00
David Sidrane
df01e343a7 Kinetis:Add LPUART serail device driver 2017-02-25 07:06:04 -10:00
David Sidrane
0cbc03255c Kinetis:Add LPUART and Clock configuartaion to freedom-k66f board 
Pin out LPUART0 for testing
   Define BOARD_SOPT2_PLLFLLSEL ti select MCGPLLCLK
   Define BOARD_SIM_CLKDIV3_FREQ etal to provide BOARD_LPUART0_FREQ
 2017-02-25 07:05:34 -10:00
David Sidrane
b553d34a68 Kinetis:Added configurable 1|2 stop bits 
HAVE_SERIAL_CONSOLE -> HAVE_UART_CONSOLE to bew consistent with
  HAVE_LPUART_CONSOLE naming
 2017-02-25 07:02:56 -10:00
David Sidrane
dd218ffa8c Kinetis:Extend clockconfig to support SOPT2_PLLFLLSEL and SIM_CLKDIV3 
A board.h file can now specify the:
   1) BOARD_SOPT2_PLLFLLSEL to select the output of the SIM_SOPT2 MUX
     from:
       MCGFLLCLK
       MCGPLLCLK
       USB1PFD
       IRC48MHZ

    2) If it defines BOARD_SIM_CLKDIV3_FREQ then it must define
    BOARD_SIM_CLKDIV3_PLLFLLFRAC and BOARD_SIM_CLKDIV3_PLLFLLDIV
    which wil be used to cpnfigure SIM_CLKDIV3 [PLLFLLFRAC, PLLFLLDIV]
 2017-02-25 07:02:56 -10:00
David Sidrane
86c9f97f78 Kinetis: Add LPUART as lowlevel console 2017-02-25 07:02:56 -10:00
David Sidrane
29ab603a66 Kinetis:Add LPUART for use with K66 
Add LPUART made UART5 an uption as the K66 does not have UART5
 2017-02-25 07:02:56 -10:00
David Sidrane
61b10c5e58 Kinetis:Add LPUART to K66 chip 
Add KINETIS_NLPUART setting it to 1 and adjust KINETIS_NUART
  to removed UART5 as the K66 dioes not have UART5
 2017-02-25 07:02:56 -10:00
David Sidrane
f6fe9beeb3 Kinetis:Add LPUART to config 2017-02-25 07:02:56 -10:00
David Sidrane
b280aef9c0 Kinetis:Add LPUART register definitions 2017-02-25 07:02:38 -10:00
David Sidrane
9061a3fb64 Kinetis: UART add UART_BDH_SBNS definition 2017-02-25 07:02:38 -10:00
Gregory Nutt
de0e2ec261 STM32: Remove one residual use of the obsoleted STM32_TIM27_FREQUENCY definition which does not work for all STM32 family members. 2017-02-25 10:04:28 -06:00
Gregory Nutt
4c6b635298 Fix error in previous commit. 2017-02-25 09:39:33 -06:00
Gregory Nutt
c694ca0ebc Enable clocking to the timer on QE setup; disable clock on QE teardown. 2017-02-25 09:26:11 -06:00
Alan Carvalho de Assis
37298504e6 Fix QEncoder driver, based on STM32L4 driver 2017-02-24 16:10:28 -06:00
Gregory Nutt
8ee2e8d8b0 Most Ethernet drviers: Check if the poll timer is running before restarting it at the end of each TX. 2017-02-24 15:58:17 -06:00
Marc Rechte
579360e77d Merge branch 'master' of https://bitbucket.org/mrechte/nuttx-twrk64 2017-02-24 08:02:08 +01:00
Marc Rechte
c734a6283c kinetis_enet.c add #define for number of loops for auto negotiation to complete 2017-02-24 08:00:11 +01:00
David Sidrane
a43554decd Kinetis:SIM add paramiterized SIM_CLKDIVx_xxFRAC|DIV macros 
The makes for cleaner board definitions like:

   Divider output clock = Divider input clock * ((PLLFLLFRAC+1)/(PLLFLLDIV+1))
       SIM_CLKDIV3_FREQ = BOARD_SOPT2_FREQ × [ (PLLFLLFRAC+1) / (PLLFLLDIV+1)]
                 90 Mhz = 180 Mhz X [(0 + 1) / (1 + 1)]
    #define BOARD_SIM_CLKDIV3_PLLFLLFRAC  1
    #define BOARD_SIM_CLKDIV3_PLLFLLDIV   2
    #define BOARD_SIM_CLKDIV3_FREQ        (BOARD_SOPT2_FREQ * (BOARD_SIM_CLKDIV3_PLLFLLFRAC / BOARD_SIM_CLKDIV3_PLLFLLDIV))
 2017-02-23 19:27:55 -10:00
David Sidrane
e1278c0cb9 Kinetis:Fix typo in comment 2017-02-23 19:25:53 -10:00
Gregory Nutt
207b4a3c68 Update README.txt 2017-02-23 11:02:06 -06:00
Gregory Nutt
d83422a00d Update README.txt 2017-02-23 10:57:21 -06:00
David Sidrane
41e3d9f174 Kinetis:Refactor you use SIM_SOPT2_PLLFLLSEL, added warning 
The warning has been added because: SIM_SOPT2_PLLFLLSEL
  is a clock selection that may feed many clock subsystem:
   USB, TPM, SDHCSRC, LPUARTSRC. Therefore, there needs to
  be a global board level setting to select  the source for
  SIM_SOPT2_PLLFLLSEL and then  derive all the  sub selections
  and proper fractions/divisors for each modules clock.
 2017-02-22 10:42:52 -10:00
David Sidrane
12c24f2644 Kinetis:kinetis_clockconfig uses the correct ACKISO 
ACKISO is located in the PMC_REGSC on the majority
   of the Kinetis SoCs. With the exception of the
   MK40DXxxxZVLQ10 where ACKISO is located in LLWU_CS
 2017-02-22 10:42:52 -10:00
David Sidrane
1324b8c00a Kinetis:Resolves issues where Freescale moved ACKISO 
ACKISO is located in the PMC_REGSC on the majority
  of the Kinetis SoCs. With the exception of the
  MK40DXxxxZVLQ10 where ACKISO is located in LLWU_CS
 2017-02-22 10:42:52 -10:00
David Sidrane
a4b985f865 Kinetis:PMC defines are based on PMC feature configuration 2017-02-22 10:42:52 -10:00
David Sidrane
1ba6eadcec Kinetis:Include the PMC features 2017-02-22 10:42:52 -10:00
David Sidrane
8525c266a1 Created a kinetis PMC versioning scheme pulled in by Kinetis chip.h 
The motvations is to version the IP blocks of the Kinetis
     K series family of parts.

     This added versioning and configuration features for the
     Kinetis PMC IP block.

     It is envisioned that in the long term as a chip is added.
     The author of the new chip definitions will either find
     the exact configuration in an existing chip define and
     add the new chip to it Or add the PMC fature configuration
     #defines to the chip ifdef list in
     arch/arm/include/kinetis/kinetis_pmc.h  In either case the
     author should mark it as "Verified to Document Number:"
     taken from the reference manual.

     The version KINETIS_PMC_VERSION_UKN has been applied to
     most all the SoCs in the kinetis arch prior to this commit.

     The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
     CONFIG_ARCH_CHIP_MK20DXxxxVLH7 All K64 and K66 have ben
     Verified PMC configurations.
 2017-02-22 10:42:52 -10:00
David Sidrane
381ffa3083 Kinetis:SIM defines are based on SIM feature configuration 2017-02-22 10:42:52 -10:00
David Sidrane
5b550a37eb Kinetis:Include the SIM features 2017-02-22 10:42:52 -10:00
David Sidrane
d74f16ecb9 Kinetis:Created a kinetis SIM versioning scheme pulled in by Kinetis chip.h 
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis SIM IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing chip define and
   add the new chip to it Or add the SIM feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_sim.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_SIM_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified SIM configurations.
 2017-02-22 10:42:52 -10:00
David Sidrane
14bdf3af22 Kinetis:Fixed Typo in kinetis_mcg header 2017-02-22 10:42:52 -10:00
Gregory Nutt
bb059432ea Move local variables to top of function for compliance with coding standard. 2017-02-20 17:54:04 -06:00
Jussi Kivilinna
4dfb8268f3 stm32f7: stm32_allocateheap: allow use DTCM memory for heap 
STM32F7 has up to 128KiB of DTCM memory that is currently left unused.

This patch adds DTCM to main heap if CONFIG_STM32F7_DTCMEXCLUDE is not enabled.
 2017-02-20 08:42:51 -06:00
Gregory Nutt
4b4f0dc4df STM32L4 COMP: Remove some unused definitions 2017-02-20 08:41:43 -06:00
Gregory Nutt
0fc226dd53 Changes from review of last PR 2017-02-19 14:58:37 -06:00
Marc Rechté
1838171d43 Add twr-k64f120m config and fix some ENET related problems 2017-02-19 21:20:56 +01:00
Gregory Nutt
4033953878 STM32L4 COMP: Port from Motorola MDK. 2017-02-19 11:33:35 -06:00
Gregory Nutt
e61ded4a14 STM32L4: Add Comparator register definition file. 2017-02-19 10:09:17 -06:00
Gregory Nutt
d900e1fac0 STM32L4: Bring LPTIM driver in from the Motorola MDK. 2017-02-18 11:06:20 -06:00
Gregory Nutt
6bafdb1cdc Remove some dangling whitespace at the end of some lines. 2017-02-18 10:20:08 -06:00
Gregory Nutt
085616d651 STM32L4: Bring power management logic from Motrola MDK into NuttX 2017-02-18 10:18:42 -06:00
Gregory Nutt
6fe94b5724 Trivial cosmetic, alignement changes. 2017-02-17 17:50:56 -06:00
Gregory Nutt
e4e7528b1a Port STM32L4 SAI driver from MDK. 2017-02-17 15:13:36 -06:00
Gregory Nutt
377fadc816 STM32L4: Add SAI register definition header file. 2017-02-17 13:52:22 -06:00
Jussi Kivilinna
dd1aa2357b Allow board to configure HSE clock in bypass-mode. This is needed to enable HSE with Nucleo-F746ZG board. 2017-02-17 07:15:22 -06:00
Masayuki Ishikawa
add2fbfa85 LM3S Ethernet: Fix interrupt work in the last big commit. 2017-02-17 17:40:58 +09:00
Gregory Nutt
a49b349614 C library: Add swab() 2017-02-16 14:42:27 -06:00
Gregory Nutt
3b351615be Kinetis K66: Change necessary for correct build. 2017-02-16 11:33:36 -06:00
Spahlinger, Michael
42e8b12ec3 Fix for SAMv7 SPI: DLYBS value wass calculated, but never written to any registers. This led to incorrect timings on the bus. 2017-02-16 07:42:37 -06:00
Gregory Nutt
c3bfccf293 Kinetis PWM: Purely cosmetic changes from review. 2017-02-15 17:54:55 -06:00
David Sidrane
c83af148b1 Kinetis:Add FTM3 to PWM 2017-02-15 13:42:36 -10:00
David Sidrane
a95a6c43d3 Kinetis Support RMII clock source select 
This defined the RMII clock source select bits and allows
  the selection to be made via Kconfig
 2017-02-15 13:42:36 -10:00
Gregory Nutt
1474300276 LPC43: Rename HAVE_CONSOLE to HAVE_SERIAL_CONSOLE. We can, of course, always have a some console other than a serial console. 2017-02-15 07:23:18 -06:00
Alan Carvalho de Assis
058f06cc94 Fix typos introduced in previous commit 2017-02-15 07:16:15 -06:00
Gregory Nutt
077adf863e Merge branch 'master' of bitbucket.org:nuttx/nuttx 2017-02-14 19:31:58 -06:00
Alan Carvalho de Assis
1b996f1c7c Add usbnsh config to Bambino 200E board 2017-02-14 19:31:39 -06:00
Gregory Nutt
4043dd4aa0 LPC43 serial: Correct conditional logi that selects /dev/ttySN. Problem noted by Alan Carvalho de Assis. 2017-02-14 19:12:11 -06:00
David Sidrane
3423a4ecc2 Kinetis: Add comment the Freedom-K66F uses KSZ8081 PHY 2017-02-14 09:15:23 -10:00
David Sidrane
35fc713931 Kinetis K64 and K66 share mpu files 2017-02-14 09:15:23 -10:00
David Sidrane
84b206bf7e Kinetis K66 FMC 
Added K66 FMC register definition
 2017-02-13 14:35:52 -10:00
David Sidrane
7d80db5919 Kinetis K66 Pin Mux 2017-02-13 14:35:51 -10:00
David Sidrane
e28781ebeb Include K66 memory map 2017-02-13 14:35:51 -10:00
David Sidrane
6597e46ce7 Define Alternate addresses for IP blocks in both AIPS0 & AIPS1 
Added ALT version of RNGA, FTM2, DAC0 as a facility to later
   define secondary access via AIPS1 to these peripherals
 2017-02-13 14:35:51 -10:00
David Sidrane
bd7d7edcf8 Kinetis: Updated comment in clockconfig 2017-02-13 13:24:47 -10:00
David Sidrane
3840c802d1 Kinetis SPI and I2C are 0 based 
The K whole family line has max 4 or each. But the supported
  parts have the maximums listed below:

    K46 and K66    3 SPI SPI0-SPI2
    K46 and K66    4 I2C I2C0-I2C3
 2017-02-13 13:24:47 -10:00
David Sidrane
ddd1f8c507 Kinetis SDHC - Enable clock after selected 2017-02-13 13:24:47 -10:00
Manohara HK
b154531838 I found an issue inside the cp15_coherent_dcache function in file, arch/arm/src/armv7-r/cp15_coherent_dcache.S. 
The "mcr CP15_BPIALLIS(r0)" instruction is used for invalidating entire branch predictor.  But the problem is, since this is the generic code and can be called on any armv7-r architecture based CPU's.  It is a problem, if this instruction is called in uni processor configuration. Because, BPIALLIS (c7, 0, c1, 6) instruction is only added as part of the "Multiprocessing Extensions" (As per ARM® Architecture Reference Manual /ARMv7-A and ARMv7-R edition)

So in my opinion, this instruction should be under SMP configuration. In non-SMP configuration this instruction could become undefined.
 2017-02-13 06:33:15 -06:00
David Sidrane
a907bbc5d3 Typo up_exit.c edited online with Bitbucket 2017-02-09 20:38:15 +00:00
Gregory Nutt
3329a534f7 Remove spurious blank line. 2017-02-09 13:06:42 -06:00
Gregory Nutt
c55d8f15a1 Merged in david_s5/nuttx/upstream_bkp_fix (pull request #206) 
STM32 & STM32F7 Fixes the bkp reference counter issue

Approved-by: Gregory Nutt
 2017-02-09 19:03:04 +00:00
David Sidrane
550d259a28 STM32F7: Fixes the bkp reference counter issue 2017-02-09 08:39:51 -10:00
David Sidrane
169b3982a2 STM32: Fixes the bkp reference counter issue 2017-02-09 08:39:51 -10:00
Gregory Nutt
a292da29d0 Costmetic changes from review of last PR. 2017-02-09 08:39:31 -10:00
David Sidrane
7262a788c4 Better granualarity and erro checking of the board's MCG settings 
Allow for complete MCG_C2 definition from the boart.h file
  Moved #ifdef out of code by setting default values for
  Allow for individule bit setting in MCG_C2 for
    BOARD_EXTCLOCK_MCG_C2
    BOARD_MCG_C2_FCFTRIM
    BOARD_MCG_C2_LOCRE0
  Added range and sanity checking
 2017-02-09 08:39:31 -10:00
David Sidrane
0e687121e5 arch/arm/include/kinetis/kinetis_mcg.h 2017-02-09 08:39:31 -10:00
David Sidrane
b2deadd569 Support the Indexed name LOCK->LOCK0 2017-02-09 08:39:30 -10:00
David Sidrane
eee029eec1 MCG defines are based on the MCG feature configuration 
We define the bits as a common set of names. This means that
  an index may be added to a name i.e. LOCK is LOCK0 as that is
  the superset name.
 2017-02-09 08:39:30 -10:00
David Sidrane
ab7b72f2e8 Kinetis chip Adding K66 and inlcuding MCG versioning 
This includes arch/arm/include/kinetis/kinetis_mcg.h
  to bring in the MCG versioning and defines the KINETIS_K66
  family for the added SoCs:

   --------------- ------- --- ------- ------- ------ ------ ------ -----
   PART NUMBER     CPU     PIN PACKAGE  TOTAL  PROGRAM EEPROM SRAM  GPIO
                   FREQ    CNT          FLASH  FLASH
   --------------- ------- --- ------- ------- ------ ------ ------ -----
   MK66FN2M0VMD18  180 MHz 144 MAPBGA   2   MB    —    — KB  260 KB 100
   MK66FX1M0VMD18  180 MHz 144 MAPBGA  1.25 MB  1 MB   4 KB  256 KB 100
   MK66FN2M0VLQ18  180 MHz 144 LQFP     2   MB    —    — KB  260 KB 100
   MK66FX1M0VLQ18  180 MHz 144 LQFP    1.25 MB  1 MB   4 KB  256 KB 100
 2017-02-09 08:39:30 -10:00
David Sidrane
9bbd98580b Created a kinetis MCG versioning scheme pulled in by Kinetis chip.h 
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis MCG IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing  chip define and
   add the new chip to it Or add the MCG feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_mcg.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_MCG_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified MCG configurations.
 2017-02-09 08:39:30 -10:00
David Sidrane
6199d1801e Add K66 memory map 2017-02-09 08:39:30 -10:00
David Sidrane
db65734820 Add Kinetis K66 to Kinetis Kconfig 2017-02-09 08:39:30 -10:00
David Sidrane
bdd99f5aa1 Removed ws at EOL 2017-02-09 08:39:30 -10:00
Marc Rechté
d501ffc563 Kinetis SDHC driver fixes. 2017-02-09 11:28:30 -06:00
Gregory Nutt
1d290c2b37 setvbuf: Add support for disabling I/O buffering. Initially cut; untested. 2017-02-09 09:24:44 -06:00
Alan Carvalho de Assis
afa1066b4d LPC43: Fix missing #endif 2017-02-08 11:52:15 -06:00
Gregory Nutt
e803e2c3f4 Costmetic changes from review of last PR. 2017-02-07 17:16:56 -06:00
David Sidrane
a4ea49aaa2 Better granualarity and erro checking of the board's MCG settings 
Allow for complete MCG_C2 definition from the boart.h file
  Moved #ifdef out of code by setting default values for
  Allow for individule bit setting in MCG_C2 for
    BOARD_EXTCLOCK_MCG_C2
    BOARD_MCG_C2_FCFTRIM
    BOARD_MCG_C2_LOCRE0
  Added range and sanity checking
 2017-02-07 12:38:28 -10:00
David Sidrane
ff056cf9bd arch/arm/include/kinetis/kinetis_mcg.h 2017-02-07 12:38:28 -10:00
David Sidrane
87f759172a Support the Indexed name LOCK->LOCK0 2017-02-07 12:38:28 -10:00
David Sidrane
6022c62229 MCG defines are based on the MCG feature configuration 
We define the bits as a common set of names. This means that
  an index may be added to a name i.e. LOCK is LOCK0 as that is
  the superset name.
 2017-02-07 12:38:28 -10:00